[llvm] r315482 - [NFC] update test case so checks are not order dependent when not needed

[Lei Huang via llvm-commits]

Author: lei
Date: Wed Oct 11 11:04:41 2017
New Revision: 315482

URL: http://llvm.org/viewvc/llvm-project?rev=315482&view=rev
Log:
[NFC] update test case so checks are not order dependent when not needed

Modified:
    llvm/trunk/test/CodeGen/PowerPC/sjlj.ll

Modified: llvm/trunk/test/CodeGen/PowerPC/sjlj.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/sjlj.ll?rev=315482&r1=315481&r2=315482&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/sjlj.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/sjlj.ll Wed Oct 11 11:04:41 2017
@@ -60,7 +60,7 @@ return:
 
 ; FIXME: We should be saving VRSAVE on Darwin, but we're not!
 
-; CHECK: @main
+; CHECK-LABEL: main:
 ; CHECK: std
 ; Make sure that we're not saving VRSAVE on non-Darwin:
 ; CHECK-NOT: mfspr
@@ -87,12 +87,12 @@ return:
 
 ; CHECK: .LBB1_5:
 
-; CHECK: lfd
-; CHECK: lxvd2x
+; CHECK-DAG: lfd
+; CHECK-DAG: lxvd2x
 ; CHECK: ld
 ; CHECK: blr
 
-; CHECK-NOAV: @main
+; CHECK-NOAV-LABEL: main:
 ; CHECK-NOAV-NOT: stxvd2x
 ; CHECK-NOAV: bcl
 ; CHECK-NOAV: mflr
@@ -131,7 +131,7 @@ return:
   %3 = load i32, i32* %retval
   ret i32 %3
 
-; CHECK: @main2
+; CHECK-LABEL: main2:
 
 ; CHECK: addis [[REG:[0-9]+]], 2, env_sigill at toc@ha
 ; CHECK-DAG: std 31, env_sigill at toc@l([[REG]])