[PATCH] D37885: [x86] Bring back the MOVZX64rr* pseudo instructions so that they can be coalesced using X86InstrInfo::isCoalescableExtInstr

[Oren Ben Simhon via Phabricator via llvm-commits]

oren_ben_simhon added a comment.

In https://reviews.llvm.org/D37885#893264, @craig.topper wrote:

> I imagine it would be possible, but we'd also need a new target hook to indicate that MOV32rr is coalescable. It just seemed easier to use the existing stuff rather than implement a second way to do it.


The benefit of coalescing SUBREG_TO_REG is that there might be cases of zero/sign extension cases (other than 64 bit zero extension) that will be also optimized by InstrEmitter/peephole passes.
Maybe it is possible to add the support of SUBREG_TO_REG into isCoalescableExtInstr (maybe in a recursive way).
Anyway I didn't try that, but it might be worth considering the possibility of a more generic coalescing.


https://reviews.llvm.org/D37885