[PATCH] D38318: [X86][SSE] Match PSHUFLW/PSHUFHW + PSHUFD vXi16 shuffle patterns (PR34686)
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 11 03:10:43 PDT 2017
RKSimon added a comment.
In https://reviews.llvm.org/D38318#894474, @delena wrote:
> In https://reviews.llvm.org/D38318#891595, @RKSimon wrote:
>
> > @delena @zvi What do you want to do with this. IMO we shouldn't be prematurely combining to variable mask shuffles, and this should be performed later as a scheduler based decision. But that will involve a lot of work that I don't think we're ready for (https://reviews.llvm.org/D26855 tried to move some other code to the MC and hit a lot of issues).
> >
> > What we could do is add a FeatureFastVariableShuffle feature flag to Haswell and later Intel CPUs and perform the decision in combineX86ShuffleChain off that?
>
>
> May be just add something like this:
> bool hasVariableShuffle(MVT Ty) {
>
> if ((hasAVX2() && Ty == XXX) || hasAVX512() && Ty == YYY)
> return true;
>
> return false;
On bdver4 and znver1 this would be a perf regression.
Repository:
rL LLVM
https://reviews.llvm.org/D38318
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