[llvm] r315445 - [Asm] Add debug tracing in table-generated assembly matcher
Oliver Stannard via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 11 02:17:43 PDT 2017
Author: olista01
Date: Wed Oct 11 02:17:43 2017
New Revision: 315445
URL: http://llvm.org/viewvc/llvm-project?rev=315445&view=rev
Log:
[Asm] Add debug tracing in table-generated assembly matcher
This adds debug tracing to the table-generated assembly instruction matcher,
enabled by the -debug-only=asm-matcher option.
The changes in the target AsmParsers are to add an MCInstrInfo reference under
a consistent name, so that we can use it from table-generated code. This was
already being used this way for targets that use deprecation warnings, but 5
targets did not have it, and Hexagon had it under a different name to the other
backends.
Modified:
llvm/trunk/include/llvm/MC/MCParser/MCTargetAsmParser.h
llvm/trunk/lib/MC/MCParser/MCTargetAsmParser.cpp
llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/trunk/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
llvm/trunk/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
llvm/trunk/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
Modified: llvm/trunk/include/llvm/MC/MCParser/MCTargetAsmParser.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCParser/MCTargetAsmParser.h?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCParser/MCTargetAsmParser.h (original)
+++ llvm/trunk/include/llvm/MC/MCParser/MCTargetAsmParser.h Wed Oct 11 02:17:43 2017
@@ -12,6 +12,7 @@
#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCParser/MCAsmLexer.h"
#include "llvm/MC/MCParser/MCAsmParserExtension.h"
#include "llvm/MC/MCTargetOptions.h"
@@ -278,7 +279,8 @@ public:
};
protected: // Can only create subclasses.
- MCTargetAsmParser(MCTargetOptions const &, const MCSubtargetInfo &STI);
+ MCTargetAsmParser(MCTargetOptions const &, const MCSubtargetInfo &STI,
+ const MCInstrInfo &MII);
/// Create a copy of STI and return a non-const reference to it.
MCSubtargetInfo ©STI();
@@ -299,6 +301,8 @@ protected: // Can only create subclasses
/// Current STI.
const MCSubtargetInfo *STI;
+ const MCInstrInfo &MII;
+
public:
MCTargetAsmParser(const MCTargetAsmParser &) = delete;
MCTargetAsmParser &operator=(const MCTargetAsmParser &) = delete;
Modified: llvm/trunk/lib/MC/MCParser/MCTargetAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCParser/MCTargetAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCParser/MCTargetAsmParser.cpp (original)
+++ llvm/trunk/lib/MC/MCParser/MCTargetAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -13,8 +13,9 @@
using namespace llvm;
MCTargetAsmParser::MCTargetAsmParser(MCTargetOptions const &MCOptions,
- const MCSubtargetInfo &STI)
- : MCOptions(MCOptions), STI(&STI) {}
+ const MCSubtargetInfo &STI,
+ const MCInstrInfo &MII)
+ : MCOptions(MCOptions), STI(&STI), MII(MII) {}
MCTargetAsmParser::~MCTargetAsmParser() = default;
Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -139,7 +139,7 @@ public:
AArch64AsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, STI) {
+ : MCTargetAsmParser(Options, STI, MII) {
IsILP32 = Options.getABIName() == "ilp32";
MCAsmParserExtension::Initialize(Parser);
MCStreamer &S = getParser().getStreamer();
Modified: llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -807,7 +807,6 @@ public:
};
class AMDGPUAsmParser : public MCTargetAsmParser {
- const MCInstrInfo &MII;
MCAsmParser &Parser;
unsigned ForcedEncodingSize = 0;
@@ -855,7 +854,7 @@ public:
AMDGPUAsmParser(const MCSubtargetInfo &STI, MCAsmParser &_Parser,
const MCInstrInfo &MII,
const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, STI), MII(MII), Parser(_Parser) {
+ : MCTargetAsmParser(Options, STI, MII), Parser(_Parser) {
MCAsmParserExtension::Initialize(Parser);
if (getFeatureBits().none()) {
Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -168,7 +168,6 @@ public:
};
class ARMAsmParser : public MCTargetAsmParser {
- const MCInstrInfo &MII;
const MCRegisterInfo *MRI;
UnwindContext UC;
@@ -581,7 +580,7 @@ public:
ARMAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, STI), MII(MII), UC(Parser) {
+ : MCTargetAsmParser(Options, STI, MII), UC(Parser) {
MCAsmParserExtension::Initialize(Parser);
// Cache the MCRegisterInfo.
Modified: llvm/trunk/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AVR/AsmParser/AVRAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AVR/AsmParser/AVRAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AVR/AsmParser/AVRAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -83,7 +83,7 @@ class AVRAsmParser : public MCTargetAsmP
public:
AVRAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, STI), STI(STI), Parser(Parser) {
+ : MCTargetAsmParser(Options, STI, MII), STI(STI), Parser(Parser) {
MCAsmParserExtension::Initialize(Parser);
MRI = getContext().getRegisterInfo();
Modified: llvm/trunk/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/AsmParser/BPFAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/BPF/AsmParser/BPFAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/BPF/AsmParser/BPFAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -28,6 +28,7 @@ namespace {
struct BPFOperand;
class BPFAsmParser : public MCTargetAsmParser {
+
SMLoc getLoc() const { return getParser().getTok().getLoc(); }
bool PreMatchCheck(OperandVector &Operands);
@@ -68,7 +69,7 @@ public:
BPFAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, STI) {
+ : MCTargetAsmParser(Options, STI, MII) {
setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
}
};
Modified: llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -96,7 +96,6 @@ class HexagonAsmParser : public MCTarget
MCAsmParser &Parser;
MCAssembler *Assembler;
- MCInstrInfo const &MCII;
MCInst MCB;
bool InBrackets;
@@ -155,8 +154,8 @@ class HexagonAsmParser : public MCTarget
public:
HexagonAsmParser(const MCSubtargetInfo &_STI, MCAsmParser &_Parser,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, _STI), Parser(_Parser),
- MCII (MII), MCB(HexagonMCInstrInfo::createBundle()), InBrackets(false) {
+ : MCTargetAsmParser(Options, _STI, MII), Parser(_Parser),
+ MCB(HexagonMCInstrInfo::createBundle()), InBrackets(false) {
setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits()));
MCAsmParserExtension::Initialize(_Parser);
@@ -462,9 +461,9 @@ bool HexagonAsmParser::finishBundle(SMLo
MCB.setLoc(IDLoc);
// Check the bundle for errors.
const MCRegisterInfo *RI = getContext().getRegisterInfo();
- HexagonMCChecker Check(getContext(), MCII, getSTI(), MCB, *RI);
+ HexagonMCChecker Check(getContext(), MII, getSTI(), MCB, *RI);
- bool CheckOk = HexagonMCInstrInfo::canonicalizePacket(MCII, getSTI(),
+ bool CheckOk = HexagonMCInstrInfo::canonicalizePacket(MII, getSTI(),
getContext(), MCB,
&Check);
@@ -608,7 +607,7 @@ bool HexagonAsmParser::MatchAndEmitInstr
MatchingInlineAsm))
return true;
HexagonMCInstrInfo::extendIfNeeded(
- getParser().getContext(), MCII, MCB, *SubInst);
+ getParser().getContext(), MII, MCB, *SubInst);
MCB.addOperand(MCOperand::createInst(SubInst));
if (!InBrackets)
return finishBundle(IDLoc, Out);
Modified: llvm/trunk/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -36,7 +36,7 @@
#include <cstdint>
#include <memory>
-namespace llvm {
+using namespace llvm;
// Auto-generated by TableGen
static unsigned MatchRegisterName(StringRef Name);
@@ -85,7 +85,7 @@ class LanaiAsmParser : public MCTargetAs
public:
LanaiAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, STI), Parser(Parser),
+ : MCTargetAsmParser(Options, STI, MII), Parser(Parser),
Lexer(Parser.getLexer()), SubtargetInfo(STI) {
setAvailableFeatures(
ComputeAvailableFeatures(SubtargetInfo.getFeatureBits()));
@@ -1226,5 +1226,3 @@ bool LanaiAsmParser::ParseInstruction(Pa
extern "C" void LLVMInitializeLanaiAsmParser() {
RegisterMCAsmParser<LanaiAsmParser> x(getTheLanaiTarget());
}
-
-} // end namespace llvm
Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -473,7 +473,7 @@ public:
MipsAsmParser(const MCSubtargetInfo &sti, MCAsmParser &parser,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, sti),
+ : MCTargetAsmParser(Options, sti, MII),
ABI(MipsABIInfo::computeTargetABI(Triple(sti.getTargetTriple()),
sti.getCPU(), Options)) {
MCAsmParserExtension::Initialize(parser);
Modified: llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -251,7 +251,6 @@ namespace {
struct PPCOperand;
class PPCAsmParser : public MCTargetAsmParser {
- const MCInstrInfo &MII;
bool IsPPC64;
bool IsDarwin;
@@ -298,7 +297,7 @@ class PPCAsmParser : public MCTargetAsmP
public:
PPCAsmParser(const MCSubtargetInfo &STI, MCAsmParser &,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, STI), MII(MII) {
+ : MCTargetAsmParser(Options, STI, MII) {
// Check for 64-bit vs. 32-bit pointer mode.
const Triple &TheTriple = STI.getTargetTriple();
IsPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
Modified: llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -30,6 +30,7 @@ namespace {
struct RISCVOperand;
class RISCVAsmParser : public MCTargetAsmParser {
+
SMLoc getLoc() const { return getParser().getTok().getLoc(); }
bool generateImmOutOfRangeError(OperandVector &Operands, uint64_t ErrorInfo,
@@ -72,7 +73,7 @@ public:
RISCVAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
const MCInstrInfo &MII, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, STI) {
+ : MCTargetAsmParser(Options, STI, MII) {
setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
}
};
Modified: llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -108,7 +108,7 @@ public:
SparcAsmParser(const MCSubtargetInfo &sti, MCAsmParser &parser,
const MCInstrInfo &MII,
const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, sti), Parser(parser) {
+ : MCTargetAsmParser(Options, sti, MII), Parser(parser) {
// Initialize the set of available features.
setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits()));
}
Modified: llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -425,7 +425,7 @@ public:
SystemZAsmParser(const MCSubtargetInfo &sti, MCAsmParser &parser,
const MCInstrInfo &MII,
const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, sti), Parser(parser) {
+ : MCTargetAsmParser(Options, sti, MII), Parser(parser) {
MCAsmParserExtension::Initialize(Parser);
// Alias the .word directive to .short.
Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Wed Oct 11 02:17:43 2017
@@ -68,7 +68,6 @@ static const char OpPrecedence[] = {
};
class X86AsmParser : public MCTargetAsmParser {
- const MCInstrInfo &MII;
ParseInstructionInfo *InstInfo;
std::unique_ptr<X86AsmInstrumentation> Instrumentation;
bool Code16GCC;
@@ -923,7 +922,7 @@ public:
X86AsmParser(const MCSubtargetInfo &sti, MCAsmParser &Parser,
const MCInstrInfo &mii, const MCTargetOptions &Options)
- : MCTargetAsmParser(Options, sti), MII(mii), InstInfo(nullptr),
+ : MCTargetAsmParser(Options, sti, mii), InstInfo(nullptr),
Code16GCC(false) {
// Initialize the set of available features.
Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=315445&r1=315444&r2=315445&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Wed Oct 11 02:17:43 2017
@@ -2856,6 +2856,26 @@ static void emitMnemonicSpellChecker(raw
}
+// Emit a function mapping match classes to strings, for debugging.
+static void emitMatchClassKindNames(std::forward_list<ClassInfo> &Infos,
+ raw_ostream &OS) {
+ OS << "#ifndef NDEBUG\n";
+ OS << "const char *getMatchClassName(MatchClassKind Kind) {\n";
+ OS << " switch (Kind) {\n";
+
+ OS << " case InvalidMatchClass: return \"InvalidMatchClass\";\n";
+ OS << " case OptionalMatchClass: return \"OptionalMatchClass\";\n";
+ for (const auto &CI : Infos) {
+ OS << " case " << CI.Name << ": return \"" << CI.Name << "\";\n";
+ }
+ OS << " case NumMatchClassKinds: return \"NumMatchClassKinds\";\n";
+
+ OS << " }\n";
+ OS << " llvm_unreachable(\"unhandled MatchClassKind!\");\n";
+ OS << "}\n\n";
+ OS << "#endif // NDEBUG\n";
+}
+
void AsmMatcherEmitter::run(raw_ostream &OS) {
CodeGenTarget Target(Records);
Record *AsmParser = Target.getAsmParser();
@@ -3023,6 +3043,8 @@ void AsmMatcherEmitter::run(raw_ostream
// Emit the routine to validate an operand against a match class.
emitValidateOperandClass(Info, OS);
+ emitMatchClassKindNames(Info.Classes, OS);
+
// Emit the available features compute function.
SubtargetFeatureInfo::emitComputeAssemblerAvailableFeatures(
Info.Target.getName(), ClassName, "ComputeAvailableFeatures",
@@ -3133,6 +3155,9 @@ void AsmMatcherEmitter::run(raw_ostream
emitMnemonicSpellChecker(OS, Target, VariantCount);
+ OS << "#include \"llvm/Support/Debug.h\"\n";
+ OS << "#include \"llvm/Support/Format.h\"\n\n";
+
// Finally, build the match function.
OS << "unsigned " << Target.getName() << ClassName << "::\n"
<< "MatchInstructionImpl(const OperandVector &Operands,\n";
@@ -3214,6 +3239,10 @@ void AsmMatcherEmitter::run(raw_ostream
"std::equal_range(Start, End, Mnemonic.lower(), LessOpcode());\n\n";
}
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"AsmMatcher: found \" <<\n"
+ << " std::distance(MnemonicRange.first, MnemonicRange.second) << \n"
+ << " \" encodings with mnemonic '\" << Mnemonic << \"'\\n\");\n\n";
+
OS << " // Return a more specific error code if no mnemonics match.\n";
OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
OS << " return Match_MnemonicFail;\n\n";
@@ -3222,6 +3251,9 @@ void AsmMatcherEmitter::run(raw_ostream
<< "*ie = MnemonicRange.second;\n";
OS << " it != ie; ++it) {\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Trying to match opcode \"\n";
+ OS << " << MII.getName(it->Opcode) << \"\\n\");\n";
+
if (ReportMultipleNearMisses) {
OS << " // Some state to record ways in which this instruction did not match.\n";
OS << " NearMissInfo OperandNearMiss = NearMissInfo::getSuccess();\n";
@@ -3247,20 +3279,35 @@ void AsmMatcherEmitter::run(raw_ostream
<< "; FormalIdx != " << MaxNumOperands << "; ++FormalIdx) {\n";
OS << " auto Formal = "
<< "static_cast<MatchClassKind>(it->Classes[FormalIdx]);\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\",\n";
+ OS << " dbgs() << \" Matching formal operand class \" << getMatchClassName(Formal)\n";
+ OS << " << \" against actual operand at index \" << ActualIdx);\n";
+ OS << " if (ActualIdx < Operands.size())\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \" (\";\n";
+ OS << " Operands[ActualIdx]->print(dbgs()); dbgs() << \"): \");\n";
+ OS << " else\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \": \");\n";
OS << " if (ActualIdx >= Operands.size()) {\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"actual operand index out of range \");\n";
if (ReportMultipleNearMisses) {
OS << " bool ThisOperandValid = (Formal == " <<"InvalidMatchClass) || "
"isSubclass(Formal, OptionalMatchClass);\n";
OS << " if (!ThisOperandValid) {\n";
OS << " if (!OperandNearMiss) {\n";
OS << " // Record info about match failure for later use.\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"recording too-few-operands near miss\\n\");\n";
OS << " OperandNearMiss =\n";
OS << " NearMissInfo::getTooFewOperands(Formal, it->Opcode);\n";
OS << " } else {\n";
OS << " // If more than one operand is invalid, give up on this match entry.\n";
+ OS << " DEBUG_WITH_TYPE(\n";
+ OS << " \"asm-matcher\",\n";
+ OS << " dbgs() << \"second invalid operand, giving up on this opcode\\n\");\n";
OS << " MultipleInvalidOperands = true;\n";
OS << " break;\n";
OS << " }\n";
+ OS << " } else {\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"but formal operand not required\\n\");\n";
OS << " }\n";
OS << " continue;\n";
} else {
@@ -3276,6 +3323,8 @@ void AsmMatcherEmitter::run(raw_ostream
OS << " MCParsedAsmOperand &Actual = *Operands[ActualIdx];\n";
OS << " unsigned Diag = validateOperandClass(Actual, Formal);\n";
OS << " if (Diag == Match_Success) {\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\",\n";
+ OS << " dbgs() << \"match success using generic matcher\\n\");\n";
OS << " ++ActualIdx;\n";
OS << " continue;\n";
OS << " }\n";
@@ -3284,6 +3333,8 @@ void AsmMatcherEmitter::run(raw_ostream
OS << " if (Diag != Match_Success) {\n";
OS << " unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);\n";
OS << " if (TargetDiag == Match_Success) {\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\",\n";
+ OS << " dbgs() << \"match success using target matcher\\n\");\n";
OS << " ++ActualIdx;\n";
OS << " continue;\n";
OS << " }\n";
@@ -3299,6 +3350,7 @@ void AsmMatcherEmitter::run(raw_ostream
if (HasOptionalOperands) {
OS << " OptionalOperandsMask.set(FormalIdx);\n";
}
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"ignoring optional operand\\n\");\n";
OS << " continue;\n";
OS << " }\n";
@@ -3306,11 +3358,19 @@ void AsmMatcherEmitter::run(raw_ostream
OS << " if (!OperandNearMiss) {\n";
OS << " // If this is the first invalid operand we have seen, record some\n";
OS << " // information about it.\n";
+ OS << " DEBUG_WITH_TYPE(\n";
+ OS << " \"asm-matcher\",\n";
+ OS << " dbgs()\n";
+ OS << " << \"operand match failed, recording near-miss with diag code \"\n";
+ OS << " << Diag << \"\\n\");\n";
OS << " OperandNearMiss =\n";
OS << " NearMissInfo::getMissedOperand(Diag, Formal, it->Opcode, ActualIdx);\n";
OS << " ++ActualIdx;\n";
OS << " } else {\n";
OS << " // If more than one operand is invalid, give up on this match entry.\n";
+ OS << " DEBUG_WITH_TYPE(\n";
+ OS << " \"asm-matcher\",\n";
+ OS << " dbgs() << \"second operand mismatch, skipping this opcode\\n\");\n";
OS << " MultipleInvalidOperands = true;\n";
OS << " break;\n";
OS << " }\n";
@@ -3334,9 +3394,14 @@ void AsmMatcherEmitter::run(raw_ostream
}
if (ReportMultipleNearMisses)
- OS << " if (MultipleInvalidOperands) continue;\n\n";
+ OS << " if (MultipleInvalidOperands) {\n";
else
- OS << " if (!OperandsValid) continue;\n\n";
+ OS << " if (!OperandsValid) {\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Opcode result: multiple \"\n";
+ OS << " \"operand mismatches, ignoring \"\n";
+ OS << " \"this opcode\\n\");\n";
+ OS << " continue;\n";
+ OS << " }\n";
// Emit check that the required features are available.
OS << " if ((AvailableFeatures & it->RequiredFeatures) "
@@ -3345,6 +3410,9 @@ void AsmMatcherEmitter::run(raw_ostream
OS << " HadMatchOtherThanFeatures = true;\n";
OS << " uint64_t NewMissingFeatures = it->RequiredFeatures & "
"~AvailableFeatures;\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Missing target features: \"\n";
+ OS << " << format_hex(NewMissingFeatures, 18)\n";
+ OS << " << \"\\n\");\n";
if (ReportMultipleNearMisses) {
OS << " FeaturesNearMiss = NearMissInfo::getMissedFeature(NewMissingFeatures);\n";
} else {
@@ -3369,6 +3437,10 @@ void AsmMatcherEmitter::run(raw_ostream
<< " if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, "
"Operands)) != Match_Success) {\n"
<< " Inst.clear();\n";
+ OS << " DEBUG_WITH_TYPE(\n";
+ OS << " \"asm-matcher\",\n";
+ OS << " dbgs() << \"Early target match predicate failed with diag code \"\n";
+ OS << " << MatchResult << \"\\n\");\n";
if (ReportMultipleNearMisses) {
OS << " EarlyPredicateNearMiss = NearMissInfo::getMissedPredicate(MatchResult);\n";
} else {
@@ -3384,7 +3456,15 @@ void AsmMatcherEmitter::run(raw_ostream
OS << " if (OperandNearMiss) {\n";
OS << " // If the operand mismatch was the only problem, reprrt it as a near-miss.\n";
OS << " if (NearMisses && !FeaturesNearMiss && !EarlyPredicateNearMiss) {\n";
+ OS << " DEBUG_WITH_TYPE(\n";
+ OS << " \"asm-matcher\",\n";
+ OS << " dbgs()\n";
+ OS << " << \"Opcode result: one mismatched operand, adding near-miss\\n\");\n";
OS << " NearMisses->push_back(OperandNearMiss);\n";
+ OS << " } else {\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Opcode result: multiple \"\n";
+ OS << " \"types of mismatch, so not \"\n";
+ OS << " \"reporting near-miss\\n\");\n";
OS << " }\n";
OS << " continue;\n";
OS << " }\n\n";
@@ -3409,6 +3489,9 @@ void AsmMatcherEmitter::run(raw_ostream
<< " // handle any context sensitive constraints.\n"
<< " if ((MatchResult = checkTargetMatchPredicate(Inst)) !="
<< " Match_Success) {\n"
+ << " DEBUG_WITH_TYPE(\"asm-matcher\",\n"
+ << " dbgs() << \"Target match predicate failed with diag code \"\n"
+ << " << MatchResult << \"\\n\");\n"
<< " Inst.clear();\n";
if (ReportMultipleNearMisses) {
OS << " LatePredicateNearMiss = NearMissInfo::getMissedPredicate(MatchResult);\n";
@@ -3427,6 +3510,9 @@ void AsmMatcherEmitter::run(raw_ostream
OS << " if (NumNearMisses == 1) {\n";
OS << " // We had exactly one type of near-miss, so add that to the list.\n";
OS << " assert(!OperandNearMiss && \"OperandNearMiss was handled earlier\");\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Opcode result: found one type of \"\n";
+ OS << " \"mismatch, so reporting a \"\n";
+ OS << " \"near-miss\\n\");\n";
OS << " if (NearMisses && FeaturesNearMiss)\n";
OS << " NearMisses->push_back(FeaturesNearMiss);\n";
OS << " else if (NearMisses && EarlyPredicateNearMiss)\n";
@@ -3437,6 +3523,9 @@ void AsmMatcherEmitter::run(raw_ostream
OS << " continue;\n";
OS << " } else if (NumNearMisses > 1) {\n";
OS << " // This instruction missed in more than one way, so ignore it.\n";
+ OS << " DEBUG_WITH_TYPE(\"asm-matcher\", dbgs() << \"Opcode result: multiple \"\n";
+ OS << " \"types of mismatch, so not \"\n";
+ OS << " \"reporting near-miss\\n\");\n";
OS << " continue;\n";
OS << " }\n";
}
@@ -3457,6 +3546,9 @@ void AsmMatcherEmitter::run(raw_ostream
OS << " }\n";
}
+ OS << " DEBUG_WITH_TYPE(\n";
+ OS << " \"asm-matcher\",\n";
+ OS << " dbgs() << \"Opcode result: complete match, selecting this opcode\\n\");\n";
OS << " return Match_Success;\n";
OS << " }\n\n";
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