[llvm] r315395 - [X86] Add 128-bit version of vbroadcasti32x2 to shuffle comment decoding.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 10 17:11:54 PDT 2017
Author: ctopper
Date: Tue Oct 10 17:11:53 2017
New Revision: 315395
URL: http://llvm.org/viewvc/llvm-project?rev=315395&view=rev
Log:
[X86] Add 128-bit version of vbroadcasti32x2 to shuffle comment decoding.
Modified:
llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp
llvm/trunk/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
llvm/trunk/test/CodeGen/X86/vector-shuffle-masked.ll
Modified: llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp?rev=315395&r1=315394&r2=315395&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp (original)
+++ llvm/trunk/lib/Target/X86/InstPrinter/X86InstComments.cpp Tue Oct 10 17:11:53 2017
@@ -293,6 +293,8 @@ static std::string getMaskName(const MCI
CASE_MASKZ_INS_COMMON(BROADCASTI32X4, , rm)
CASE_MASKZ_INS_COMMON(BROADCASTF32X8, , rm)
CASE_MASKZ_INS_COMMON(BROADCASTI32X8, , rm)
+ CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z128, r)
+ CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z128, m)
CASE_MASKZ_INS_COMMON(BROADCASTF32X2, Z256, r)
CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z256, r)
CASE_MASKZ_INS_COMMON(BROADCASTF32X2, Z256, m)
@@ -382,6 +384,8 @@ static std::string getMaskName(const MCI
CASE_MASK_INS_COMMON(BROADCASTI32X4, , rm)
CASE_MASK_INS_COMMON(BROADCASTF32X8, , rm)
CASE_MASK_INS_COMMON(BROADCASTI32X8, , rm)
+ CASE_MASK_INS_COMMON(BROADCASTI32X2, Z128, r)
+ CASE_MASK_INS_COMMON(BROADCASTI32X2, Z128, m)
CASE_MASK_INS_COMMON(BROADCASTF32X2, Z256, r)
CASE_MASK_INS_COMMON(BROADCASTI32X2, Z256, r)
CASE_MASK_INS_COMMON(BROADCASTF32X2, Z256, m)
@@ -1090,6 +1094,13 @@ bool llvm::EmitAnyX86InstComments(const
DecodeSubVectorBroadcast(MVT::v16f32, MVT::v8f32, ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
+ CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, r)
+ Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
+ LLVM_FALLTHROUGH;
+ CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, m)
+ DecodeSubVectorBroadcast(MVT::v4f32, MVT::v2f32, ShuffleMask);
+ DestName = getRegName(MI->getOperand(0).getReg());
+ break;
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, r)
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, r)
Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
Modified: llvm/trunk/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll?rev=315395&r1=315394&r2=315395&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll Tue Oct 10 17:11:53 2017
@@ -16,7 +16,7 @@ define <4 x i32> @test_masked_2xi32_to_4
; CHECK: # BB#0:
; CHECK-NEXT: movb $4, %al
; CHECK-NEXT: kmovw %eax, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@@ -29,7 +29,7 @@ define <4 x i32> @test_masked_z_2xi32_to
; CHECK: # BB#0:
; CHECK-NEXT: movb $4, %al
; CHECK-NEXT: kmovw %eax, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%res = select <4 x i1> <i1 0, i1 0, i1 1, i1 0>, <4 x i32> %shuf, <4 x i32> zeroinitializer
@@ -40,7 +40,7 @@ define <4 x i32> @test_masked_2xi32_to_4
; CHECK: # BB#0:
; CHECK-NEXT: movb $13, %al
; CHECK-NEXT: kmovw %eax, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@@ -53,7 +53,7 @@ define <4 x i32> @test_masked_z_2xi32_to
; CHECK: # BB#0:
; CHECK-NEXT: movb $13, %al
; CHECK-NEXT: kmovw %eax, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%res = select <4 x i1> <i1 1, i1 0, i1 1, i1 1>, <4 x i32> %shuf, <4 x i32> zeroinitializer
@@ -64,7 +64,7 @@ define <4 x i32> @test_masked_2xi32_to_4
; CHECK: # BB#0:
; CHECK-NEXT: movb $5, %al
; CHECK-NEXT: kmovw %eax, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@@ -77,7 +77,7 @@ define <4 x i32> @test_masked_z_2xi32_to
; CHECK: # BB#0:
; CHECK-NEXT: movb $5, %al
; CHECK-NEXT: kmovw %eax, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%res = select <4 x i1> <i1 1, i1 0, i1 1, i1 0>, <4 x i32> %shuf, <4 x i32> zeroinitializer
@@ -88,7 +88,7 @@ define <4 x i32> @test_masked_2xi32_to_4
; CHECK: # BB#0:
; CHECK-NEXT: movb $14, %al
; CHECK-NEXT: kmovw %eax, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@@ -101,7 +101,7 @@ define <4 x i32> @test_masked_z_2xi32_to
; CHECK: # BB#0:
; CHECK-NEXT: movb $14, %al
; CHECK-NEXT: kmovw %eax, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%res = select <4 x i1> <i1 0, i1 1, i1 1, i1 1>, <4 x i32> %shuf, <4 x i32> zeroinitializer
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-masked.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-masked.ll?rev=315395&r1=315394&r2=315395&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-masked.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-masked.ll Tue Oct 10 17:11:53 2017
@@ -1713,7 +1713,7 @@ define <4 x i32> @test_broadcasti32x2_v4
; CHECK-LABEL: test_broadcasti32x2_v4i32:
; CHECK: # BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@@ -1727,7 +1727,7 @@ define <4 x i32> @test_broadcasti32x2_v4
; CHECK-LABEL: test_broadcasti32x2_v4i32_z:
; CHECK: # BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
+; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%mask.cast = bitcast i8 %mask to <8 x i1>
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