[PATCH] D38196: [AArch64] Avoid interleaved SIMD store instructions for Exynos
Abderrazek Zaafrani via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 9 16:55:35 PDT 2017
az updated this revision to Diff 118297.
az added a comment.
Kristof, Thank you for the feedback. Very useful comments to make the patch more readable and more maintainable.
I addressed your comments with the new version.
https://reviews.llvm.org/D38196
Files:
llvm/lib/Target/AArch64/AArch64VectorByElementOpt.cpp
llvm/test/CodeGen/AArch64/arm64-st1.ll
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