[llvm] r315203 - [AArch64] fix typos in test assertions

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Sun Oct  8 18:29:54 2017
New Revision: 315203

URL: http://llvm.org/viewvc/llvm-project?rev=315203&view=rev
Log:
[AArch64] fix typos in test assertions

Modified:
    llvm/trunk/test/CodeGen/AArch64/fp16-v16-instructions.ll

Modified: llvm/trunk/test/CodeGen/AArch64/fp16-v16-instructions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fp16-v16-instructions.ll?rev=315203&r1=315202&r2=315203&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fp16-v16-instructions.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/fp16-v16-instructions.ll Sun Oct  8 18:29:54 2017
@@ -11,7 +11,7 @@ define <16 x half> @sitofp_i32(<16 x i32
 ; CHECK-DAG: fcvtn v1.4h, [[S2]]
 ; CHECK-DAG: v[[R1:[0-9]+]].4h, [[S1]]
 ; CHECK-DAG: v[[R3:[0-9]+]].4h, [[S3]]
-; CHECK-DAg: ins v0.d[1], v[[R1]].d[0]
+; CHECK-DAG: ins v0.d[1], v[[R1]].d[0]
 ; CHECK-DAG: ins v1.d[1], v[[R3]].d[0]
 
   %1 = sitofp <16 x i32> %a to <16 x half>
@@ -62,7 +62,7 @@ define <16 x half> @uitofp_i32(<16 x i32
 ; CHECK-DAG: fcvtn v1.4h, [[S2]]
 ; CHECK-DAG: v[[R1:[0-9]+]].4h, [[S1]]
 ; CHECK-DAG: v[[R3:[0-9]+]].4h, [[S3]]
-; CHECK-DAg: ins v0.d[1], v[[R1]].d[0]
+; CHECK-DAG: ins v0.d[1], v[[R1]].d[0]
 ; CHECK-DAG: ins v1.d[1], v[[R3]].d[0]
 
   %1 = uitofp <16 x i32> %a to <16 x half>