[llvm] r315178 - [AArch64][GlobalISel] Add a test case for G_PHI of p0 regbank selection.

[Amara Emerson via llvm-commits]

Author: aemerson
Date: Sun Oct  8 08:29:31 2017
New Revision: 315178

URL: http://llvm.org/viewvc/llvm-project?rev=315178&view=rev
Log:
[AArch64][GlobalISel] Add a test case for G_PHI of p0 regbank selection.

Modified:
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir?rev=315178&r1=315177&r2=315178&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir Sun Oct  8 08:29:31 2017
@@ -66,6 +66,9 @@
 
   define void @test_fptosi_s64_s32() { ret void }
   define void @test_fptoui_s32_s64() { ret void }
+
+  define void @test_gphi_ptr() { ret void }
+
 ...
 
 ---
@@ -877,3 +880,42 @@ body: |
     %0(s64) = COPY %d0
     %1(s32) = G_FPTOUI %0
 ...
+
+---
+# CHECK-LABEL: name: test_gphi_ptr
+name:            test_gphi_ptr
+legalized:       true
+tracksRegLiveness: true
+# CHECK: registers:
+# CHECK:   - { id: 0, class: gpr, preferred-register: '' }
+# CHECK:   - { id: 1, class: gpr, preferred-register: '' }
+# CHECK:   - { id: 2, class: gpr, preferred-register: '' }
+# CHECK:   - { id: 3, class: gpr, preferred-register: '' }
+registers:
+  - { id: 0, class: _, preferred-register: '' }
+  - { id: 1, class: _, preferred-register: '' }
+  - { id: 2, class: _, preferred-register: '' }
+  - { id: 3, class: _, preferred-register: '' }
+  - { id: 4, class: _, preferred-register: '' }
+  - { id: 5, class: _, preferred-register: '' }
+body:             |
+  bb.0:
+    successors: %bb.1, %bb.2
+    liveins: %w2, %x0, %x1
+
+    %0(p0) = COPY %x0
+    %1(p0) = COPY %x1
+    %2(s1) = COPY %w2
+    G_BRCOND %2(s1), %bb.1
+    G_BR %bb.2
+
+  bb.1:
+    successors: %bb.2
+
+
+  bb.2:
+    %3(p0) = G_PHI %0(p0), %bb.0, %1(p0), %bb.1
+    %x0 = COPY %3(p0)
+    RET_ReallyLR implicit %x0
+
+...