[llvm] r315156 - [X86][SSE] Match bitcasted BUILD_VECTOR of constants for v2i64 shifts on 64-bit targets (PR34855)

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Sat Oct  7 10:57:22 2017
New Revision: 315156

URL: http://llvm.org/viewvc/llvm-project?rev=315156&view=rev
Log:
[X86][SSE] Match bitcasted BUILD_VECTOR of constants for v2i64 shifts on 64-bit targets (PR34855)

Extension to rL315155, generate constant shifts on 64-bits as well as 32-bits.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/pr34855.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=315156&r1=315155&r2=315156&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sat Oct  7 10:57:22 2017
@@ -22150,9 +22150,9 @@ static SDValue LowerScalarImmediateShift
     }
   }
 
-  // Special case in 32-bit mode, where i64 is expanded into high and low parts.
+  // Check cases (mainly 32-bit) where i64 is expanded into high and low parts.
   // TODO: Replace constant extraction with getTargetConstantBitsFromNode.
-  if (!Subtarget.is64Bit() && !Subtarget.hasXOP() &&
+  if (!Subtarget.hasXOP() &&
       (VT == MVT::v2i64 || (Subtarget.hasInt256() && VT == MVT::v4i64) ||
        (Subtarget.hasAVX512() && VT == MVT::v8i64))) {
 

Modified: llvm/trunk/test/CodeGen/X86/pr34855.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34855.ll?rev=315156&r1=315155&r2=315156&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34855.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34855.ll Sat Oct  7 10:57:22 2017
@@ -18,12 +18,6 @@ define void @PR34855(<2 x i32> *%p0, <2
 ; X64-NEXT:    movslq (%rdi), %rax
 ; X64-NEXT:    movq %rax, %xmm1
 ; X64-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
-; X64-NEXT:    pxor %xmm0, %xmm0
-; X64-NEXT:    movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
-; X64-NEXT:    psrlq %xmm0, %xmm2
-; X64-NEXT:    psrlq %xmm0, %xmm1
-; X64-NEXT:    pxor %xmm2, %xmm1
-; X64-NEXT:    psubq %xmm2, %xmm1
 ; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
 ; X64-NEXT:    movq %xmm0, (%rdx)
 ; X64-NEXT:    retq