[PATCH] D37758: [AMDGPU] For amdpal, widen interpolation mode workaround
Tim Renouf via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 2 23:52:57 PDT 2017
tpr added inline comments.
================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:1511-1517
+ unsigned PsInputBits = Info->getPSInputAddr() & Info->getPSInputEnable();
+ if ((PsInputBits & 0x7F) == 0 ||
+ ((PsInputBits & 0xF) == 0 &&
+ (PsInputBits >> 11 & 1)))
+ Info->markPSInputEnabled(
+ countTrailingZeros(Info->getPSInputAddr(), ZB_Undefined));
}
----------------
nhaehnle wrote:
> Could you make this guarded by isAmdPalOS? For Mesa, it's possible that another shader part will enable some of those input bits, so we want to set those enables only after the combined enable mask is known.
Oops, it was guarded by isAmdPalOS in my first local version of this change. But I seem to have lost it.
I will re-add the guard.
https://reviews.llvm.org/D37758
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