[PATCH] D29933: [RISCV 11/n] Initial codegen support for ALU operations

[Philip Reames via Phabricator via llvm-commits]

reames added a subscriber: test.
reames added inline comments.


================
Comment at: test/CodeGen/RISCV/alu.ll:10
+; TODO: check support for materialising larger constants
+  %1 = add i32 %a, 1
+  ret i32 %1
----------------
if we'd wanted to be extremely pedantic about splitting up patches into the minimal possible functionality, you could have landed support for *just* the return statement (i.e. not the ALU bits).  That would have let you split out a tiny bit of code, but not enough to be worth splitting now.

i.e. test cases of the form:
define i32 @test(i32 %a) {
  ret i32 %a
}


https://reviews.llvm.org/D29933