[llvm] r314712 - [InstCombine] auto-generate complete checks; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Mon Oct  2 13:16:59 2017
New Revision: 314712

URL: http://llvm.org/viewvc/llvm-project?rev=314712&view=rev
Log:
[InstCombine] auto-generate complete checks; NFC

Modified:
    llvm/trunk/test/Transforms/InstCombine/select.ll

Modified: llvm/trunk/test/Transforms/InstCombine/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/select.ll?rev=314712&r1=314711&r2=314712&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/select.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/select.ll Mon Oct  2 13:16:59 2017
@@ -880,114 +880,129 @@ define void @truncs_before_selects(<4 x
 
 ; PR8575
 
-define i32 @test52(i32 %n, i32 %m) nounwind {
+define i32 @test52(i32 %n, i32 %m) {
 ; CHECK-LABEL: @test52(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 %n, %m
+; CHECK-NEXT:    [[STOREMERGE:%.*]] = select i1 [[CMP]], i32 1, i32 6
+; CHECK-NEXT:    ret i32 [[STOREMERGE]]
+;
   %cmp = icmp sgt i32 %n, %m
   %. = select i1 %cmp, i32 1, i32 3
   %add = add nsw i32 %., 3
   %storemerge = select i1 %cmp, i32 %., i32 %add
-; CHECK: select i1 %cmp, i32 1, i32 6
   ret i32 %storemerge
 }
 
 ; PR9454
-define i32 @test53(i32 %x) nounwind {
+
+define i32 @test53(i32 %x) {
+; CHECK-LABEL: @test53(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 %x, 2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[AND]], %x
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 2, i32 1
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
   %and = and i32 %x, 2
   %cmp = icmp eq i32 %and, %x
   %sel = select i1 %cmp, i32 2, i32 1
   ret i32 %sel
-; CHECK-LABEL: @test53(
-; CHECK: select i1 %cmp
-; CHECK: ret
 }
 
 define i32 @test54(i32 %X, i32 %Y) {
+; CHECK-LABEL: @test54(
+; CHECK-NEXT:    [[B:%.*]] = icmp ne i32 %X, 0
+; CHECK-NEXT:    [[C:%.*]] = zext i1 [[B]] to i32
+; CHECK-NEXT:    ret i32 [[C]]
+;
   %A = ashr exact i32 %X, %Y
   %B = icmp eq i32 %A, 0
   %C = select i1 %B, i32 %A, i32 1
   ret i32 %C
-; CHECK-LABEL: @test54(
-; CHECK-NOT: ashr
-; CHECK-NOT: select
-; CHECK: icmp ne i32 %X, 0
-; CHECK: zext
-; CHECK: ret
 }
 
 define i1 @test55(i1 %X, i32 %Y, i32 %Z) {
+; CHECK-LABEL: @test55(
+; CHECK-NEXT:    [[C:%.*]] = icmp eq i32 %Y, 0
+; CHECK-NEXT:    ret i1 [[C]]
+;
   %A = ashr exact i32 %Y, %Z
   %B = select i1 %X, i32 %Y, i32 %A
   %C = icmp eq i32 %B, 0
   ret i1 %C
-; CHECK-LABEL: @test55(
-; CHECK-NOT: ashr
-; CHECK-NOT: select
-; CHECK: icmp eq
-; CHECK: ret i1
 }
 
-define i32 @test56(i16 %x) nounwind {
+define i32 @test56(i16 %x) {
+; CHECK-LABEL: @test56(
+; CHECK-NEXT:    [[CONV:%.*]] = zext i16 %x to i32
+; CHECK-NEXT:    ret i32 [[CONV]]
+;
   %tobool = icmp eq i16 %x, 0
   %conv = zext i16 %x to i32
   %cond = select i1 %tobool, i32 0, i32 %conv
   ret i32 %cond
-; CHECK-LABEL: @test56(
-; CHECK-NEXT: zext
-; CHECK-NEXT: ret
 }
 
-define i32 @test57(i32 %x, i32 %y) nounwind {
+define i32 @test57(i32 %x, i32 %y) {
+; CHECK-LABEL: @test57(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 %x, %y
+; CHECK-NEXT:    ret i32 [[AND]]
+;
   %and = and i32 %x, %y
   %tobool = icmp eq i32 %x, 0
   %.and = select i1 %tobool, i32 0, i32 %and
   ret i32 %.and
-; CHECK-LABEL: @test57(
-; CHECK-NEXT: and i32 %x, %y
-; CHECK-NEXT: ret
 }
 
-define i32 @test58(i16 %x) nounwind {
+define i32 @test58(i16 %x) {
+; CHECK-LABEL: @test58(
+; CHECK-NEXT:    [[CONV:%.*]] = zext i16 %x to i32
+; CHECK-NEXT:    ret i32 [[CONV]]
+;
   %tobool = icmp ne i16 %x, 1
   %conv = zext i16 %x to i32
   %cond = select i1 %tobool, i32 %conv, i32 1
   ret i32 %cond
-; CHECK-LABEL: @test58(
-; CHECK-NEXT: zext
-; CHECK-NEXT: ret
 }
 
-define i32 @test59(i32 %x, i32 %y) nounwind {
+define i32 @test59(i32 %x, i32 %y) {
+; CHECK-LABEL: @test59(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 %x, %y
+; CHECK-NEXT:    ret i32 [[AND]]
+;
   %and = and i32 %x, %y
   %tobool = icmp ne i32 %x, %y
   %.and = select i1 %tobool, i32 %and, i32 %y
   ret i32 %.and
-; CHECK-LABEL: @test59(
-; CHECK-NEXT: and i32 %x, %y
-; CHECK-NEXT: ret
 }
 
-define i1 @test60(i32 %x, i1* %y) nounwind {
+define i1 @test60(i32 %x, i1* %y) {
+; CHECK-LABEL: @test60(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 %x, 0
+; CHECK-NEXT:    [[LOAD:%.*]] = load i1, i1* %y, align 1
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i32 %x, 1
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i1 [[LOAD]], i1 [[CMP1]]
+; CHECK-NEXT:    ret i1 [[SEL]]
+;
   %cmp = icmp eq i32 %x, 0
   %load = load i1, i1* %y, align 1
   %cmp1 = icmp slt i32 %x, 1
   %sel = select i1 %cmp, i1 %load, i1 %cmp1
   ret i1 %sel
-; CHECK-LABEL: @test60(
-; CHECK: select
 }
 
 @glbl = constant i32 10
 define i32 @test61(i32* %ptr) {
+; CHECK-LABEL: @test61(
+; CHECK-NEXT:    ret i32 10
+;
   %A = load i32, i32* %ptr
   %B = icmp eq i32* %ptr, @glbl
   %C = select i1 %B, i32 %A, i32 10
   ret i32 %C
-; CHECK-LABEL: @test61(
-; CHECK: ret i32 10
 }
 
 ; PR14131
-define void @test64(i32 %p, i16 %b) noreturn nounwind {
+define void @test64(i32 %p, i16 %b) noreturn {
 entry:
   %p.addr.0.insert.mask = and i32 %p, -65536
   %conv2 = and i32 %p, 65535