[PATCH] D38128: Handle COPYs of physregs better (regalloc hints)

Mon Oct 2 09:39:09 PDT 2017

jonpa updated this revision to Diff 117370.
jonpa added a comment.

Patch slightly updated:

- Clear any target-independent hint when computing copy-hints. This was what trunk was actually doing already.
- 'continue', don't 'return', in the loop in TargetRegisterInfo::getRegAllocationHints().

ARMBaseRegisterInfo is the only target that overrides getRegAllocationHints() and I thought that probably these new multiple copy hints should be added in the end, but I'm actually not sure as it seems there are heuristics for all odd / even registers covering half of the AllocationOrder already.

BTW, I don't quite understand what SIRegisterInfo is doing calling setRegAllocationHint() in eliminateFrameIndex(), which is run way after RA...?

On SystemZ this patch means both less COPYs and spilling on SPEC:

  lgr            :               343989               331447   -12542
  brasl          :               249851               250243     +392
  lr             :                25979                25680     -299
  ...
  Spill|Reload   :               168111               167429     -682

Does this look good enough (at least with the right behavior) so that I (help, please) should start to look at all those ~250 CodeGen tests?

/Jonas

https://reviews.llvm.org/D38128

Files:
  include/llvm/CodeGen/MachineRegisterInfo.h
  include/llvm/Target/TargetRegisterInfo.h
  lib/CodeGen/CalcSpillWeights.cpp
  lib/CodeGen/TargetRegisterInfo.cpp
  test/CodeGen/SystemZ/call-args-coalesce.mir
  test/CodeGen/SystemZ/swift-return.ll
  test/CodeGen/SystemZ/swifterror.ll

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