[PATCH] D38451: [mips] Correct the instruction predicates for microMIPSr3

Simon Dardis via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 2 02:26:36 PDT 2017


sdardis created this revision.
Herald added a subscriber: arichardson.

Rather than using the AdditionalPredicates mechanism to guard
the microMIPS instructions, use the existing predicates to properly
guard those instructions.

This also resolves a case where an instruction pattern was incorrectly
available for microMIPS32R6, which caused a register allocation failure
as the registers specified in the pattern were not available.


Repository:
  rL LLVM

https://reviews.llvm.org/D38451

Files:
  lib/Target/Mips/MicroMipsInstrFPU.td
  test/CodeGen/Mips/nmadd.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D38451.117311.patch
Type: text/x-patch
Size: 27623 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171002/fe19dd01/attachment-0001.bin>


More information about the llvm-commits mailing list