[PATCH] D38449: [X86] Redefine MOVSS/MOVSD instructions to take VR128 regclass as input instead of FR32/FR64

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

This is managing to remove quite a few moves with improved register allocation - I had no idea that it was so sensitive to copies.

Context is missing.


https://reviews.llvm.org/D38449