[PATCH] D38449: [X86] Redefine MOVSS/MOVSD instructions to take VR128 regclass as input instead of FR32/FR64
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Oct 1 22:45:17 PDT 2017
craig.topper created this revision.
This patch redefines the MOVSS/MOVSD instructions to take VR128 as its second input. This allows the MOVSS/SD->BLEND commute to work without requiring a COPY to be inserted.
This should fix PR33079
Overall this looks to be an improvement in the generated code. I haven't checked the EXPENSIVE_CHECKS build but I'll do that and update with results.
https://reviews.llvm.org/D38449
Files:
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrInfo.cpp
lib/Target/X86/X86InstrSSE.td
test/CodeGen/X86/buildvec-insertvec.ll
test/CodeGen/X86/lower-vec-shift.ll
test/CodeGen/X86/psubus.ll
test/CodeGen/X86/vector-blend.ll
test/CodeGen/X86/vector-compare-results.ll
test/CodeGen/X86/vector-rotate-128.ll
test/CodeGen/X86/vector-shift-ashr-128.ll
test/CodeGen/X86/vector-shift-lshr-128.ll
test/CodeGen/X86/vector-shift-shl-128.ll
test/CodeGen/X86/vector-trunc-math.ll
test/CodeGen/X86/vector-trunc.ll
test/CodeGen/X86/vshift-4.ll
test/CodeGen/X86/x86-shifts.ll
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