[PATCH] D38378: Optimize {s,u}{add,sub}.with.overflow on ARM.

[Joel Galenson via Phabricator via llvm-commits]

jgalenson added inline comments.


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Comment at: lib/Target/ARM/ARMBaseInstrInfo.cpp:2569
+  if ((CmpI->getOpcode() == ARM::CMPrr || CmpI->getOpcode() == ARM::t2CMPrr) &&
+      (OI->getOpcode() == ARM::ADDrr || OI->getOpcode() == ARM::t2ADDrr ||
+       OI->getOpcode() == ARM::ADDri || OI->getOpcode() == ARM::t2ADDri) &&
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javed.absar wrote:
> Did you mean t2ADDrr in second case? You have two conditions checking for ARM::ADDrr. Same wit ARM::ADDri
I'm not sure what you mean.  This seems reasonable to me.  I'm using the result and first operand of the add to match the two operands of the compare, so I don't care what the last operand of the add is.  I thus don't care whether it's a register or an immediate, and it can also be either ARM or Thumb.  So don't all four of these cases work?


https://reviews.llvm.org/D38378