[PATCH] D37514: [PowerPC] support ZERO_EXTEND in tryBitPermutation
Hiroshi Inoue via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 29 12:40:32 PDT 2017
inouehrs added inline comments.
================
Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1079
+ for (i = 32; i < NumBits; ++i)
+ if (!(*LHSBits)[i].isZero()) break;
+ if (i != NumBits)
----------------
hfinkel wrote:
> hfinkel wrote:
> > Why are you checking that the upper bits are zero? This is a zext node, so I'd think you should just force them all to zero (like the code for AND does for bits that are zero).
> Or, to put it another way, if you do it this way, then you should have a comment that reads something like, "We'll look through zext nodes here, but only if they're provably redundant." If we do this, however, we should explain why.
As you suggested, zero extension is like logical AND and so I do not need to check the upper bits.
I removed the check.
https://reviews.llvm.org/D37514
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