[PATCH] D35625: Removal of microMIPS64R6

[Simon Dardis via Phabricator via llvm-commits]

sdardis added a comment.

For SelectionDAGISel purposes, these instruction mappings were spurious as SelectionDAGISel would pick the corresponding microMIPS instruction due to the various predicates. If however, these instructions were introduced by the likes of MipsSEISelLowering or MipsSEISelDAGToDAG, etc, we'd end up with a mixture of MIPS and microMIPS code. This isn't a problem when producing assembly, as the textual representation is the same, but for object emission we need to produce the correct opcodes. The instruction mapping tables quietly "fixup" the usage of MIPS opcodes in microMIPS code which simplifies injecting instructions by hand in cpp as we don't have to constantly do things like:

  BuildMI(MBB, I, DL, TII.get(STI.inMicroMips ? Mips::DADDU_MMR6 : Mips::DADDu), V1).addReg(V0)

throughout the codebase.


Repository:
  rL LLVM

https://reviews.llvm.org/D35625