[llvm] r314380 - [DAGCombiner] Fix an off-by-one error in vector logic
George Burgess IV via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 27 23:17:19 PDT 2017
Author: gbiv
Date: Wed Sep 27 23:17:19 2017
New Revision: 314380
URL: http://llvm.org/viewvc/llvm-project?rev=314380&view=rev
Log:
[DAGCombiner] Fix an off-by-one error in vector logic
Without this, we could end up trying to get the Nth (0-indexed) element
from a subvector of size N.
Differential Revision: https://reviews.llvm.org/D37880
Added:
llvm/trunk/test/CodeGen/ARM/crash-on-pow2-shufflevector.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=314380&r1=314379&r2=314380&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Sep 27 23:17:19 2017
@@ -14501,8 +14501,8 @@ SDValue DAGCombiner::reduceBuildVecToShu
}
NearestPow2 = PowerOf2Ceil(MaxIndex);
- if (InVT.isSimple() && (NearestPow2 > 2) &&
- ((NumElems * 2) < NearestPow2)) {
+ if (InVT.isSimple() && NearestPow2 > 2 && MaxIndex < NearestPow2 &&
+ NumElems * 2 < NearestPow2) {
unsigned SplitSize = NearestPow2 / 2;
EVT SplitVT = EVT::getVectorVT(*DAG.getContext(),
InVT.getVectorElementType(), SplitSize);
Added: llvm/trunk/test/CodeGen/ARM/crash-on-pow2-shufflevector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/crash-on-pow2-shufflevector.ll?rev=314380&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/crash-on-pow2-shufflevector.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/crash-on-pow2-shufflevector.ll Wed Sep 27 23:17:19 2017
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=armv7 | FileCheck %s
+;
+; Ensure that don't crash given a largeish power-of-two shufflevector index.
+
+%struct.desc = type { i32, [7 x i32] }
+
+define i32 @foo(%struct.desc* %descs, i32 %num, i32 %cw) local_unnamed_addr #0 {
+; CHECK-LABEL: foo:
+; CHECK: @ BB#0: @ %entry
+; CHECK-NEXT: mov r1, #32
+; CHECK-NEXT: vld1.32 {d16, d17}, [r0], r1
+; CHECK-NEXT: vld1.32 {d18, d19}, [r0]
+; CHECK-NEXT: vtrn.32 q8, q9
+; CHECK-NEXT: vadd.i32 d16, d16, d16
+; CHECK-NEXT: vmov.32 r0, d16[1]
+; CHECK-NEXT: bx lr
+entry:
+ %descs.vec = bitcast %struct.desc* %descs to <16 x i32>*
+ %wide.vec = load <16 x i32>, <16 x i32>* %descs.vec, align 4
+ %strided.vec = shufflevector <16 x i32> %wide.vec, <16 x i32> undef, <2 x i32> <i32 0, i32 8>
+ %bin.rdx20 = add <2 x i32> %strided.vec, %strided.vec
+ %0 = extractelement <2 x i32> %bin.rdx20, i32 1
+ ret i32 %0
+}
More information about the llvm-commits
mailing list