[PATCH] D38333: [X86] Load the SJLJ jump table address into a register on x86_64

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo created this revision.

The previous version didn't work if the jump table base address didn't fit in 32 bit, since it was encoded as an immediate offset.

This solves one part of the issues mentioned in PR34720.


https://reviews.llvm.org/D38333

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/sjlj-eh.ll


Index: test/CodeGen/X86/sjlj-eh.ll
===================================================================
--- test/CodeGen/X86/sjlj-eh.ll
+++ test/CodeGen/X86/sjlj-eh.ll
@@ -116,4 +116,5 @@
 ; CHECK-X64: ud2
 ; CHECK-X64: [[CONT]]:
 ;     *Handlers[UFC.__callsite]
-; CHECK-X64: jmpq *.LJTI
+; CHECK-X64: leaq .[[TABLE:LJTI[0-9]+_[0-9]+]](%rip), %rcx
+; CHECK-X64: jmpq *(%rcx,%rax,8)
Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -26578,13 +26578,35 @@
       .addImm(LPadList.size());
   BuildMI(DispatchBB, DL, TII->get(X86::JAE_1)).addMBB(TrapBB);
 
-  BuildMI(DispContBB, DL,
-          TII->get(Subtarget.is64Bit() ? X86::JMP64m : X86::JMP32m))
-      .addReg(0)
-      .addImm(Subtarget.is64Bit() ? 8 : 4)
-      .addReg(IReg)
-      .addJumpTableIndex(MJTI)
-      .addReg(0);
+  if (Subtarget.is64Bit()) {
+    unsigned IReg64 = MRI->createVirtualRegister(&X86::GR64RegClass);
+    unsigned Base = MRI->createVirtualRegister(&X86::GR64RegClass);
+    BuildMI(DispContBB, DL, TII->get(X86::LEA64r), Base)
+        .addReg(X86::RIP)
+        .addImm(1)
+        .addReg(0)
+        .addJumpTableIndex(MJTI)
+        .addReg(0);
+
+    BuildMI(DispContBB, DL, TII->get(TargetOpcode::COPY), IReg64)
+        .addReg(IReg);
+
+    BuildMI(DispContBB, DL,
+            TII->get(X86::JMP64m))
+        .addReg(Base)
+        .addImm(8)
+        .addReg(IReg64)
+        .addImm(0)
+        .addReg(0);
+  } else {
+    BuildMI(DispContBB, DL,
+            TII->get(X86::JMP32m))
+        .addReg(0)
+        .addImm(Subtarget.is64Bit() ? 8 : 4)
+        .addReg(IReg)
+        .addJumpTableIndex(MJTI)
+        .addReg(0);
+  }
 
   // Add the jump table entries as successors to the MBB.
   SmallPtrSet<MachineBasicBlock *, 8> SeenMBBs;


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