[llvm] r314280 - [ARM] isTruncateFree fix
Sam Parker via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 27 01:30:45 PDT 2017
Author: sam_parker
Date: Wed Sep 27 01:30:45 2017
New Revision: 314280
URL: http://llvm.org/viewvc/llvm-project?rev=314280&view=rev
Log:
[ARM] isTruncateFree fix
I implemented isTruncateFree in rL313533, this patch fixes the logic
to match my comment, as the previous logic was too general. Now the
only truncates that are free are i64 -> i32.
Differential Revision: https://reviews.llvm.org/D38234
Modified:
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=314280&r1=314279&r2=314280&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Sep 27 01:30:45 2017
@@ -12320,18 +12320,18 @@ EVT ARMTargetLowering::getOptimalMemOpTy
bool ARMTargetLowering::isTruncateFree(Type *SrcTy, Type *DstTy) const {
if (!SrcTy->isIntegerTy() || !DstTy->isIntegerTy())
return false;
- unsigned NumBits1 = SrcTy->getPrimitiveSizeInBits();
- unsigned NumBits2 = DstTy->getPrimitiveSizeInBits();
- return NumBits1 > NumBits2;
+ unsigned SrcBits = SrcTy->getPrimitiveSizeInBits();
+ unsigned DestBits = DstTy->getPrimitiveSizeInBits();
+ return (SrcBits == 64 && DestBits == 32);
}
bool ARMTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const {
if (SrcVT.isVector() || DstVT.isVector() || !SrcVT.isInteger() ||
!DstVT.isInteger())
return false;
- unsigned NumBits1 = SrcVT.getSizeInBits();
- unsigned NumBits2 = DstVT.getSizeInBits();
- return NumBits1 > NumBits2;
+ unsigned SrcBits = SrcVT.getSizeInBits();
+ unsigned DestBits = DstVT.getSizeInBits();
+ return (SrcBits == 64 && DestBits == 32);
}
bool ARMTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
More information about the llvm-commits
mailing list