[PATCH] D38271: [Builtins] Use 4 byte alignment for __aeabi_memclr.

Manoj Gupta via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 26 15:30:46 PDT 2017


manojgupta created this revision.
Herald added subscribers: javed.absar, aemerson.

Align __aeabi_memclr to 4 bytes. All other ARM functions are already aligned to
4-bytes in compiler-rt.
(Split off from review https://reviews.llvm.org/D38227)


https://reviews.llvm.org/D38271

Files:
  lib/builtins/arm/aeabi_memset.S


Index: lib/builtins/arm/aeabi_memset.S
===================================================================
--- lib/builtins/arm/aeabi_memset.S
+++ lib/builtins/arm/aeabi_memset.S
@@ -24,6 +24,7 @@
 DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_memset4, __aeabi_memset)
 DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_memset8, __aeabi_memset)
 
+        .p2align 2
 DEFINE_COMPILERRT_FUNCTION(__aeabi_memclr)
         mov     r2, r1
         movs    r1, #0


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D38271.116639.patch
Type: text/x-patch
Size: 435 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170926/7be9b235/attachment-0001.bin>


More information about the llvm-commits mailing list