[PATCH] D37945: [X86] [ASM INTEL SYNTAX] fix for incorrect assembler code generation when x86-asm-syntax=intel (PR34617)
Konstantin Belochapka via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 25 12:28:31 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL314140: [X86] [ASM INTEL SYNTAX] fix for incorrect assembler code generation when x86… (authored by kbelochapka).
Changed prior to commit:
https://reviews.llvm.org/D37945?vs=115526&id=116589#toc
Repository:
rL LLVM
https://reviews.llvm.org/D37945
Files:
llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
llvm/trunk/test/MC/X86/intel-syntax-var-offset.ll
Index: llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
+++ llvm/trunk/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp
@@ -152,6 +152,7 @@
O << formatImm((int64_t)Op.getImm());
} else {
assert(Op.isExpr() && "unknown operand kind in printOperand");
+ O << "offset ";
Op.getExpr()->print(O, &MAI);
}
}
Index: llvm/trunk/test/MC/X86/intel-syntax-var-offset.ll
===================================================================
--- llvm/trunk/test/MC/X86/intel-syntax-var-offset.ll
+++ llvm/trunk/test/MC/X86/intel-syntax-var-offset.ll
@@ -0,0 +1,49 @@
+;RUN: llc -mtriple=x86_64-unknown-unknown -filetype=asm -x86-asm-syntax=intel < %s | FileCheck %s --check-prefix=CHECK
+;PR34617
+
+;Compile it with: "clang -O1 -emit-llvm"
+;char X[4];
+;volatile char* PX;
+;char Y[4];
+;volatile char* PY;
+;char Z[4];
+;volatile char* PZ;
+;char* test057(long long x) {
+; asm ("movq %1, %%rax;"
+; "movq %%rax, %0;"
+; "pushq $Y;"
+; "popq %%rcx;"
+; "movq %%rcx, PY;"
+; "movq $X, %%rdx;"
+; "movq %%rdx, PX;"
+; :"=r"(PZ)
+; :"p"(Z)
+; :"%rax", "%rcx", "%rdx"
+; );
+; return (char*)PZ;
+;}
+
+; CHECK: mov rax, offset Z
+; CHECK: push offset Y
+; CHECK: pop rcx
+; CHECK: mov qword ptr [PY], rcx
+; CHECK: mov rdx, offset X
+; CHECK: mov qword ptr [PX], rdx
+
+ at PZ = common global i8* null, align 8
+ at Z = common global [4 x i8] zeroinitializer, align 1
+ at X = common global [4 x i8] zeroinitializer, align 1
+ at PX = common global i8* null, align 8
+ at Y = common global [4 x i8] zeroinitializer, align 1
+ at PY = common global i8* null, align 8
+
+define i8* @test057(i64 %x) {
+entry:
+ %x.addr = alloca i64, align 8
+ store i64 %x, i64* %x.addr, align 8
+ %0 = call i8* asm "movq $1, %rax;movq %rax, $0;pushq $$Y;popq %rcx;movq %rcx, PY;movq $$X, %rdx;movq %rdx, PX;", "=r,im,~{rax},~{rcx},~{rdx},~{dirflag},~{fpsr},~{flags}"(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @Z, i32 0, i32 0))
+ store i8* %0, i8** @PZ, align 8
+ %1 = load i8*, i8** @PZ, align 8
+ ret i8* %1
+}
+
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