[PATCH] D38234: [ARM] isTruncateFree fix

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

Fixed the isTruncateFree logic to match my comment, as the previous logic was way too general. Now the only truncates that are free are i64 -> i32.


https://reviews.llvm.org/D38234

Files:
  lib/Target/ARM/ARMISelLowering.cpp


Index: lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- lib/Target/ARM/ARMISelLowering.cpp
+++ lib/Target/ARM/ARMISelLowering.cpp
@@ -12320,18 +12320,18 @@
 bool ARMTargetLowering::isTruncateFree(Type *SrcTy, Type *DstTy) const {
   if (!SrcTy->isIntegerTy() || !DstTy->isIntegerTy())
     return false;
-  unsigned NumBits1 = SrcTy->getPrimitiveSizeInBits();
-  unsigned NumBits2 = DstTy->getPrimitiveSizeInBits();
-  return NumBits1 > NumBits2;
+  unsigned SrcBits = SrcTy->getPrimitiveSizeInBits();
+  unsigned DestBits = DstTy->getPrimitiveSizeInBits();
+  return (SrcBits == 64 && DestBits == 32);
 }
 
 bool ARMTargetLowering::isTruncateFree(EVT SrcVT, EVT DstVT) const {
   if (SrcVT.isVector() || DstVT.isVector() || !SrcVT.isInteger() ||
       !DstVT.isInteger())
     return false;
-  unsigned NumBits1 = SrcVT.getSizeInBits();
-  unsigned NumBits2 = DstVT.getSizeInBits();
-  return NumBits1 > NumBits2;
+  unsigned SrcBits = SrcVT.getSizeInBits();
+  unsigned DestBits = DstVT.getSizeInBits();
+  return (SrcBits == 64 && DestBits == 32);
 }
 
 bool ARMTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D38234.116540.patch
Type: text/x-patch
Size: 1181 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170925/e2e03bd3/attachment.bin>