[PATCH] D38146: [AArch64] Fix bug in store of vector 0 DAGCombine.
Geoff Berry via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 21 14:11:48 PDT 2017
This revision was automatically updated to reflect the committed changes.
Closed by commit rL313916: [AArch64] Fix bug in store of vector 0 DAGCombine. (authored by gberry).
Changed prior to commit:
https://reviews.llvm.org/D38146?vs=116223&id=116265#toc
Repository:
rL LLVM
https://reviews.llvm.org/D38146
Files:
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/trunk/test/CodeGen/AArch64/arm64-memset-inline.ll
llvm/trunk/test/CodeGen/AArch64/fastcc.ll
llvm/trunk/test/CodeGen/AArch64/ldst-opt.ll
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