[PATCH] D38084: [ARM] add, or, shl combining
    Sam Parker via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Wed Sep 20 08:45:57 PDT 2017
    
    
  
samparker created this revision.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.
The generic dag combiner will fold:
  (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2)
  (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2)
This can create constants which are too large to use as an immediate. Many ALU operations are also able of performing the shl, so we can unfold the transformation to prevent a mov imm instruction from being generated.
      
I've also enabled the swapping of operands during the creation of ARMISD::CMP nodes, because the compare instructions can also perform the optional shift of the second operand.
The combining of ORs to BFI has also been extracted out into its own function.
https://reviews.llvm.org/D38084
Files:
  lib/Target/ARM/ARMISelLowering.cpp
  test/CodeGen/ARM/unfold-shifts.ll
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