[llvm] r313737 - [IfConversion] Add testcases [NFC]
Mikael Holmen via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 20 01:23:29 PDT 2017
Author: uabelho
Date: Wed Sep 20 01:23:29 2017
New Revision: 313737
URL: http://llvm.org/viewvc/llvm-project?rev=313737&view=rev
Log:
[IfConversion] Add testcases [NFC]
These tests should have been included in r310697 / D34099 but apparently
I missed them.
Added:
llvm/trunk/test/CodeGen/MIR/ARM/PR32721_ifcvt_triangle_unanalyzable.mir
llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_diamond_unanalyzable.mir
llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_forked_diamond_unanalyzable.mir
llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_bad_zero_prob_succ.mir
llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_unanalyzable.mir
llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_triangleWoCvtToNextEdge.mir
Added: llvm/trunk/test/CodeGen/MIR/ARM/PR32721_ifcvt_triangle_unanalyzable.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/ARM/PR32721_ifcvt_triangle_unanalyzable.mir?rev=313737&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/PR32721_ifcvt_triangle_unanalyzable.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/ARM/PR32721_ifcvt_triangle_unanalyzable.mir Wed Sep 20 01:23:29 2017
@@ -0,0 +1,23 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name: foo
+body: |
+ bb.0:
+ B %bb.2
+
+ bb.1:
+ BX_RET 14, 0
+
+ bb.2:
+ Bcc %bb.1, 1, %cpsr
+
+ bb.3:
+ B %bb.1
+...
+
+# We should get a single block containing the BX_RET, with no successors at all
+
+# CHECK: body:
+# CHECK-NEXT: bb.0:
+# CHECK-NEXT: BX_RET
+
Added: llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_diamond_unanalyzable.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_diamond_unanalyzable.mir?rev=313737&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_diamond_unanalyzable.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_diamond_unanalyzable.mir Wed Sep 20 01:23:29 2017
@@ -0,0 +1,30 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name: foo
+body: |
+ bb.0:
+ Bcc %bb.2, 1, %cpsr
+
+ bb.1:
+ %sp = tADDspi %sp, 1, 14, _
+ B %bb.3
+
+ bb.2:
+ %sp = tADDspi %sp, 2, 14, _
+ B %bb.3
+
+ bb.3:
+ successors:
+ %sp = tADDspi %sp, 3, 14, _
+ BX_RET 14, _
+...
+
+# Diamond testcase with unanalyzable instruction in the BB following the
+# diamond.
+
+# CHECK: body: |
+# CHECK: bb.0:
+# CHECK: %sp = tADDspi %sp, 2, 1, %cpsr
+# CHECK: %sp = tADDspi %sp, 1, 0, %cpsr, implicit %sp
+# CHECK: %sp = tADDspi %sp, 3, 14, _
+# CHECK: BX_RET 14, _
Added: llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_forked_diamond_unanalyzable.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_forked_diamond_unanalyzable.mir?rev=313737&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_forked_diamond_unanalyzable.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_forked_diamond_unanalyzable.mir Wed Sep 20 01:23:29 2017
@@ -0,0 +1,48 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name: foo
+body: |
+ bb.0:
+ Bcc %bb.2, 1, %cpsr
+
+ bb.1:
+ successors: %bb.3(0x20000000), %bb.4(0x60000000)
+ %sp = tADDspi %sp, 1, 14, _
+ Bcc %bb.3, 1, %cpsr
+ B %bb.4
+
+ bb.2:
+ successors: %bb.3(0x20000000), %bb.4(0x60000000)
+ %sp = tADDspi %sp, 2, 14, _
+ Bcc %bb.3, 1, %cpsr
+ B %bb.4
+
+ bb.3:
+ successors:
+ %sp = tADDspi %sp, 3, 14, _
+ BX_RET 14, _
+
+ bb.4:
+ successors:
+ %sp = tADDspi %sp, 4, 14, _
+ BX_RET 14, _
+...
+
+# Forked-diamond testcase with unanalyzable instructions in both the True and
+# False BBs following the forked diamond.
+
+# CHECK: body: |
+# CHECK: bb.0:
+# CHECK: successors: %bb.2(0x20000000), %bb.1(0x60000000)
+
+# CHECK: %sp = tADDspi %sp, 2, 1, %cpsr
+# CHECK: %sp = tADDspi %sp, 1, 0, %cpsr, implicit %sp
+# CHECK: Bcc %bb.2, 1, %cpsr
+
+# CHECK: bb.1:
+# CHECK: %sp = tADDspi %sp, 4, 14, _
+# CHECK: BX_RET 14, _
+
+# CHECK: bb.2:
+# CHECK: %sp = tADDspi %sp, 3, 14, _
+# CHECK: BX_RET 14, _
Added: llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_bad_zero_prob_succ.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_bad_zero_prob_succ.mir?rev=313737&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_bad_zero_prob_succ.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_bad_zero_prob_succ.mir Wed Sep 20 01:23:29 2017
@@ -0,0 +1,33 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name: f1
+body: |
+ bb.0:
+
+ bb.1:
+ Bcc %bb.3, 0, %cpsr
+
+ bb.2:
+
+ bb.3:
+ Bcc %bb.1, 0, %cpsr
+
+ bb.4:
+ successors: %bb.1
+ tBRIND %r1, 14, _
+...
+
+# We should only get bb.1 as successor to bb.1. No zero percent probability
+# edge from bb.1 to bb.2. There shouldn't even be a bb.2 at all.
+
+# CHECK: body: |
+# CHECK: bb.0:
+# CHECK: successors: %bb.1(0x80000000)
+
+# CHECK: bb.1:
+# CHECK: successors: %bb.1(0x80000000)
+# CHECK-NOT: %bb.2(0x00000000)
+# CHECK: tBRIND %r1, 1, %cpsr
+# CHECK: B %bb.1
+
+#CHECK-NOT: bb.2:
Added: llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_unanalyzable.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_unanalyzable.mir?rev=313737&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_unanalyzable.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_simple_unanalyzable.mir Wed Sep 20 01:23:29 2017
@@ -0,0 +1,25 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+---
+name: foo
+body: |
+ bb.0:
+ Bcc %bb.2, 0, %cpsr
+
+ bb.1:
+ successors:
+ BX_RET 14, _
+
+ bb.2:
+ successors:
+ %sp = tADDspi %sp, 2, 14, _
+ BX_RET 14, _
+...
+
+# Simple testcase with unanalyzable instructions in both TBB and FBB.
+
+# CHECK: body: |
+# CHECK: bb.0:
+# CHECK: %sp = tADDspi %sp, 2, 0, %cpsr
+# CHECK: BX_RET 0, %cpsr
+# CHECK: BX_RET 14, _
+
Added: llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_triangleWoCvtToNextEdge.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_triangleWoCvtToNextEdge.mir?rev=313737&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_triangleWoCvtToNextEdge.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/ARM/ifcvt_triangleWoCvtToNextEdge.mir Wed Sep 20 01:23:29 2017
@@ -0,0 +1,52 @@
+# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
+--- |
+ declare void @__stack_chk_fail()
+ declare void @bar()
+
+ define void @foo() {
+ ret void
+ }
+...
+---
+name: foo
+body: |
+
+ bb.0:
+ Bcc %bb.1, 1, %cpsr
+ B %bb.2
+
+ bb.1:
+ Bcc %bb.3, 0, %cpsr
+
+ bb.2:
+ successors:
+ tBL 14, %cpsr, @__stack_chk_fail
+
+ bb.3:
+ successors:
+ %sp = tADDspi %sp, 2, 14, _
+ %sp = tADDspi %sp, 2, 14, _
+ tTAILJMPdND @bar, 14, %cpsr
+...
+
+# bb.2 has no successors, presumably because __stack_chk_fail doesn't return,
+# so there should be no edge from bb.2 to bb.3.
+# Nevertheless, IfConversion treats bb.1, bb.2, bb.3 as a triangle and
+# inserts a predicated copy of bb.2 in bb.1.
+
+# This caused r302876 to die with a failed assertion.
+
+# CHECK: bb.0:
+# CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
+# CHECK: Bcc %bb.2, 1, %cpsr
+
+# CHECK: bb.1:
+# CHECK-NOT: successors: %bb
+# CHECK: tBL 14, %cpsr, @__stack_chk_fail
+
+# CHECK: bb.2:
+# CHECK-NOT: successors: %bb
+# CHECK: tBL 1, %cpsr, @__stack_chk_fail
+# CHECK: %sp = tADDspi %sp, 2, 14, _
+# CHECK: %sp = tADDspi %sp, 2, 14, _
+# CHECK: tTAILJMPdND @bar, 14, %cpsr
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