[PATCH] D38053: [AArch64] Implement R_AARCH64_ LD_PREL_LO19

[Davide Italiano via Phabricator via llvm-commits]

davide created this revision.
Herald added subscribers: kristof.beyls, javed.absar, emaste, rengolin, aemerson.

Fixes PR34660. See the test for details on the reloc.


https://reviews.llvm.org/D38053

Files:
  ELF/Arch/AArch64.cpp
  ELF/InputSection.cpp
  test/ELF/pr34660.s


Index: test/ELF/pr34660.s
===================================================================
--- /dev/null
+++ test/ELF/pr34660.s
@@ -0,0 +1,29 @@
+# REQUIRES: aarch64
+
+# RUN: llvm-mc -filetype=obj -triple=aarch64-linux-none %s -o %t.o
+# RUN: llvm-readobj -elf-output-style=GNU %t.o -r | FileCheck %s --check-prefix=RELS
+# RUN: ld.lld -shared %t.o -o %t
+# RUN: llvm-objdump %t -d | FileCheck %s --check-prefix=DISASM
+# RUN: llvm-readobj -elf-output-style=GNU %t -t | FileCheck %s --check-prefix=SYM
+
+# It would be much easier to understand/read this test if llvm-objdump would print
+# the immediates in hex.
+# IMM = hex(65540) = 0x10004
+# PC = 0x10000
+# As the relocation is PC-relative, IMM + PC = 0x20004 which is the VA of the
+# correct symbol.
+
+# RELS: Relocation section '.rela.text' at offset 0xa8 contains 1 entries:
+# RELS: 0000000000000000  0000000300000111 R_AARCH64_LD_PREL_LO19 0000000000000000 .data + 4
+
+# DISASM: Disassembly of section .text:
+# DISASM-NEXT: $x.0:
+# DISASM-NEXT:   10000:       28 00 08 58     ldr     x8, #65540
+
+# SYM: Symbol table '.symtab'
+# SYM:  0000000000020004     0 NOTYPE  LOCAL  DEFAULT    5 patatino
+
+  ldr x8, patatino
+  .data
+  .zero 4
+patatino:
Index: ELF/InputSection.cpp
===================================================================
--- ELF/InputSection.cpp
+++ ELF/InputSection.cpp
@@ -471,6 +471,7 @@
   case R_AARCH64_PREL32:
   case R_AARCH64_PREL64:
   case R_AARCH64_ADR_PREL_LO21:
+  case R_AARCH64_LD_PREL_LO19:
     return P + A;
   }
   llvm_unreachable("AArch64 pc-relative relocation expected\n");
Index: ELF/Arch/AArch64.cpp
===================================================================
--- ELF/Arch/AArch64.cpp
+++ ELF/Arch/AArch64.cpp
@@ -92,6 +92,7 @@
   case R_AARCH64_PREL32:
   case R_AARCH64_PREL64:
   case R_AARCH64_ADR_PREL_LO21:
+  case R_AARCH64_LD_PREL_LO19:
     return R_PC;
   case R_AARCH64_ADR_PREL_PG_HI21:
     return R_PAGE_PC;
@@ -232,6 +233,10 @@
     checkInt<21>(Loc, Val, Type);
     write32AArch64Addr(Loc, Val);
     break;
+  case R_AARCH64_LD_PREL_LO19:
+    checkInt<21>(Loc, Val, Type);
+    or32le(Loc, (Val & 0x1FFFFC) << 3);
+    break;
   case R_AARCH64_JUMP26:
     // Normally we would just write the bits of the immediate field, however
     // when patching instructions for the cpu errata fix -fix-cortex-a53-843419


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