[llvm] r313632 - [X86][SSE] Add 'redundant pand' test case from PR34620

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Tue Sep 19 07:02:16 2017
New Revision: 313632

URL: http://llvm.org/viewvc/llvm-project?rev=313632&view=rev
Log:
[X86][SSE] Add 'redundant pand' test case from PR34620

Modified:
    llvm/trunk/test/CodeGen/X86/combine-and.ll

Modified: llvm/trunk/test/CodeGen/X86/combine-and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-and.ll?rev=313632&r1=313631&r2=313632&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-and.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-and.ll Tue Sep 19 07:02:16 2017
@@ -270,3 +270,22 @@ define <4 x i32> @ashr_mask7_v4i32(<4 x
   %2 = and <4 x i32> %1, <i32 7, i32 7, i32 7, i32 7>
   ret <4 x i32> %2
 }
+
+;
+; SimplifyDemandedBits
+;
+
+; PR34620 - redundant PAND after vector shift of a byte vector (PSRLW)
+define <16 x i8> @PR34620(<16 x i8> %a0, <16 x i8> %a1) {
+; CHECK-LABEL: PR34620:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    psrlw $1, %xmm0
+; CHECK-NEXT:    pand {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    pand {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    paddb %xmm1, %xmm0
+; CHECK-NEXT:    retq
+  %1 = lshr <16 x i8> %a0, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
+  %2 = and <16 x i8> %1, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
+  %3 = add <16 x i8> %2, %a1
+  ret <16 x i8> %3
+}