[llvm] r313559 - [SLP] Add a test for PR34635, NFC.
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 18 12:33:31 PDT 2017
Author: abataev
Date: Mon Sep 18 12:33:30 2017
New Revision: 313559
URL: http://llvm.org/viewvc/llvm-project?rev=313559&view=rev
Log:
[SLP] Add a test for PR34635, NFC.
Added:
llvm/trunk/test/Transforms/SLPVectorizer/X86/PR34635.ll
Added: llvm/trunk/test/Transforms/SLPVectorizer/X86/PR34635.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SLPVectorizer/X86/PR34635.ll?rev=313559&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/SLPVectorizer/X86/PR34635.ll (added)
+++ llvm/trunk/test/Transforms/SLPVectorizer/X86/PR34635.ll Mon Sep 18 12:33:30 2017
@@ -0,0 +1,176 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -mtriple=x86_64-unknown-linux -slp-vectorizer -S | FileCheck %s
+
+target triple = "x86_64-unknown-linux-gnu"
+%struct.widget = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct.widget.0*, %struct.widget*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
+%struct.widget.0 = type { %struct.widget.0*, %struct.widget*, i32 }
+%struct.bar = type { %struct.wibble }
+%struct.wibble = type { %struct.eggs }
+%struct.eggs = type { %struct.blam }
+%struct.blam = type { [8 x i32] }
+
+ at stderr = external local_unnamed_addr global %struct.widget*, align 8
+ at stderr.1 = private unnamed_addr constant [14 x i8] c"minidx = %ld\0A\00", align 1
+
+; Function Attrs: norecurse uwtable
+define i32 @main() local_unnamed_addr #0 {
+; CHECK-LABEL: @main(
+; CHECK-NEXT: bb:
+; CHECK-NEXT: [[TMP:%.*]] = alloca <8 x i32>, align 32
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i32>* [[TMP]] to %struct.bar*
+; CHECK-NEXT: [[TMP2:%.*]] = alloca i64, align 8
+; CHECK-NEXT: [[TMP3:%.*]] = bitcast <8 x i32>* [[TMP]] to i8*
+; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 32, i8* nonnull [[TMP3]]) #4
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds <8 x i32>, <8 x i32>* [[TMP]], i64 0, i64 0
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_BAR:%.*]], %struct.bar* [[TMP1]], i64 0, i32 0, i32 0, i32 0, i32 0, i64 1
+; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_BAR]], %struct.bar* [[TMP1]], i64 0, i32 0, i32 0, i32 0, i32 0, i64 2
+; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_BAR]], %struct.bar* [[TMP1]], i64 0, i32 0, i32 0, i32 0, i32 0, i64 3
+; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_BAR]], %struct.bar* [[TMP1]], i64 0, i32 0, i32 0, i32 0, i32 0, i64 4
+; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_BAR]], %struct.bar* [[TMP1]], i64 0, i32 0, i32 0, i32 0, i32 0, i64 6
+; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_BAR]], %struct.bar* [[TMP1]], i64 0, i32 0, i32 0, i32 0, i32 0, i64 5
+; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_BAR]], %struct.bar* [[TMP1]], i64 0, i32 0, i32 0, i32 0, i32 0, i64 7
+; CHECK-NEXT: store <8 x i32> <i32 -221320154, i32 -756426931, i32 563883532, i32 382683935, i32 144890241, i32 -1052877364, i32 -1052877364, i32 -1016007675>, <8 x i32>* [[TMP]], align 32, !tbaa !0
+; CHECK-NEXT: call void asm sideeffect "", "=*m,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(%struct.bar* nonnull [[TMP1]], %struct.bar* nonnull [[TMP1]]) #4, !srcloc !4
+; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64* [[TMP2]] to i8*
+; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull [[TMP12]]) #4
+; CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP4]], align 32, !tbaa !0
+; CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP5]], align 4, !tbaa !0
+; CHECK-NEXT: [[TMP15:%.*]] = icmp slt i32 [[TMP14]], [[TMP13]]
+; CHECK-NEXT: [[TMP16:%.*]] = select i1 [[TMP15]], i32 [[TMP14]], i32 [[TMP13]]
+; CHECK-NEXT: [[TMP17:%.*]] = zext i1 [[TMP15]] to i64
+; CHECK-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP6]], align 8, !tbaa !0
+; CHECK-NEXT: [[TMP19:%.*]] = icmp slt i32 [[TMP18]], [[TMP16]]
+; CHECK-NEXT: [[TMP20:%.*]] = select i1 [[TMP19]], i32 [[TMP18]], i32 [[TMP16]]
+; CHECK-NEXT: [[TMP21:%.*]] = select i1 [[TMP19]], i64 2, i64 [[TMP17]]
+; CHECK-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP7]], align 4, !tbaa !0
+; CHECK-NEXT: [[TMP23:%.*]] = icmp slt i32 [[TMP22]], [[TMP20]]
+; CHECK-NEXT: [[TMP24:%.*]] = select i1 [[TMP23]], i32 [[TMP22]], i32 [[TMP20]]
+; CHECK-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i64 3, i64 [[TMP21]]
+; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP8]], align 16, !tbaa !0
+; CHECK-NEXT: [[TMP27:%.*]] = icmp slt i32 [[TMP26]], [[TMP24]]
+; CHECK-NEXT: [[TMP28:%.*]] = select i1 [[TMP27]], i32 [[TMP26]], i32 [[TMP24]]
+; CHECK-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], i64 4, i64 [[TMP25]]
+; CHECK-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP10]], align 4, !tbaa !0
+; CHECK-NEXT: [[TMP31:%.*]] = icmp slt i32 [[TMP30]], [[TMP28]]
+; CHECK-NEXT: [[TMP32:%.*]] = select i1 [[TMP31]], i32 [[TMP30]], i32 [[TMP28]]
+; CHECK-NEXT: [[TMP33:%.*]] = select i1 [[TMP31]], i64 5, i64 [[TMP29]]
+; CHECK-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP9]], align 8, !tbaa !0
+; CHECK-NEXT: [[TMP35:%.*]] = icmp slt i32 [[TMP34]], [[TMP32]]
+; CHECK-NEXT: [[TMP36:%.*]] = select i1 [[TMP35]], i32 [[TMP34]], i32 [[TMP32]]
+; CHECK-NEXT: [[TMP37:%.*]] = select i1 [[TMP35]], i64 6, i64 [[TMP33]]
+; CHECK-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP11]], align 4, !tbaa !0
+; CHECK-NEXT: [[TMP39:%.*]] = icmp slt i32 [[TMP38]], [[TMP36]]
+; CHECK-NEXT: [[TMP40:%.*]] = select i1 [[TMP39]], i64 7, i64 [[TMP37]]
+; CHECK-NEXT: store i64 [[TMP40]], i64* [[TMP2]], align 8, !tbaa !5
+; CHECK-NEXT: call void asm sideeffect "", "=*m,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* nonnull [[TMP2]], i64* nonnull [[TMP2]]) #4, !srcloc !7
+; CHECK-NEXT: [[TMP41:%.*]] = load %struct.widget*, %struct.widget** @stderr, align 8, !tbaa !8
+; CHECK-NEXT: [[TMP42:%.*]] = load i64, i64* [[TMP2]], align 8, !tbaa !5
+; CHECK-NEXT: [[TMP43:%.*]] = call i32 (%struct.widget*, i8*, ...) @fprintf(%struct.widget* [[TMP41]], i8* getelementptr inbounds ([14 x i8], [14 x i8]* @stderr.1, i64 0, i64 0), i64 [[TMP42]]) #5
+; CHECK-NEXT: [[TMP44:%.*]] = load i64, i64* [[TMP2]], align 8, !tbaa !5
+; CHECK-NEXT: [[TMP45:%.*]] = icmp eq i64 [[TMP44]], 5
+; CHECK-NEXT: br i1 [[TMP45]], label [[BB47:%.*]], label [[BB46:%.*]]
+; CHECK: bb46:
+; CHECK-NEXT: call void @abort() #6
+; CHECK-NEXT: unreachable
+; CHECK: bb47:
+; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull [[TMP12]]) #4
+; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 32, i8* nonnull [[TMP3]]) #4
+; CHECK-NEXT: ret i32 0
+;
+bb:
+ %tmp = alloca <8 x i32>, align 32
+ %tmp1 = bitcast <8 x i32>* %tmp to %struct.bar*
+ %tmp2 = alloca i64, align 8
+ %tmp3 = bitcast <8 x i32>* %tmp to i8*
+ call void @llvm.lifetime.start.p0i8(i64 32, i8* nonnull %tmp3) #4
+ %tmp4 = getelementptr inbounds <8 x i32>, <8 x i32>* %tmp, i64 0, i64 0
+ %tmp5 = getelementptr inbounds %struct.bar, %struct.bar* %tmp1, i64 0, i32 0, i32 0, i32 0, i32 0, i64 1
+ %tmp6 = getelementptr inbounds %struct.bar, %struct.bar* %tmp1, i64 0, i32 0, i32 0, i32 0, i32 0, i64 2
+ %tmp7 = getelementptr inbounds %struct.bar, %struct.bar* %tmp1, i64 0, i32 0, i32 0, i32 0, i32 0, i64 3
+ %tmp8 = getelementptr inbounds %struct.bar, %struct.bar* %tmp1, i64 0, i32 0, i32 0, i32 0, i32 0, i64 4
+ %tmp9 = getelementptr inbounds %struct.bar, %struct.bar* %tmp1, i64 0, i32 0, i32 0, i32 0, i32 0, i64 6
+ %tmp10 = getelementptr inbounds %struct.bar, %struct.bar* %tmp1, i64 0, i32 0, i32 0, i32 0, i32 0, i64 5
+ %tmp11 = getelementptr inbounds %struct.bar, %struct.bar* %tmp1, i64 0, i32 0, i32 0, i32 0, i32 0, i64 7
+ store <8 x i32> <i32 -221320154, i32 -756426931, i32 563883532, i32 382683935, i32 144890241, i32 -1052877364, i32 -1052877364, i32 -1016007675>, <8 x i32>* %tmp, align 32, !tbaa !3
+ call void asm sideeffect "", "=*m,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(%struct.bar* nonnull %tmp1, %struct.bar* nonnull %tmp1) #4, !srcloc !7
+ %tmp12 = bitcast i64* %tmp2 to i8*
+ call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %tmp12) #4
+ %tmp13 = load i32, i32* %tmp4, align 32, !tbaa !3
+ %tmp14 = load i32, i32* %tmp5, align 4, !tbaa !3
+ %tmp15 = icmp slt i32 %tmp14, %tmp13
+ %tmp16 = select i1 %tmp15, i32 %tmp14, i32 %tmp13
+ %tmp17 = zext i1 %tmp15 to i64
+ %tmp18 = load i32, i32* %tmp6, align 8, !tbaa !3
+ %tmp19 = icmp slt i32 %tmp18, %tmp16
+ %tmp20 = select i1 %tmp19, i32 %tmp18, i32 %tmp16
+ %tmp21 = select i1 %tmp19, i64 2, i64 %tmp17
+ %tmp22 = load i32, i32* %tmp7, align 4, !tbaa !3
+ %tmp23 = icmp slt i32 %tmp22, %tmp20
+ %tmp24 = select i1 %tmp23, i32 %tmp22, i32 %tmp20
+ %tmp25 = select i1 %tmp23, i64 3, i64 %tmp21
+ %tmp26 = load i32, i32* %tmp8, align 16, !tbaa !3
+ %tmp27 = icmp slt i32 %tmp26, %tmp24
+ %tmp28 = select i1 %tmp27, i32 %tmp26, i32 %tmp24
+ %tmp29 = select i1 %tmp27, i64 4, i64 %tmp25
+ %tmp30 = load i32, i32* %tmp10, align 4, !tbaa !3
+ %tmp31 = icmp slt i32 %tmp30, %tmp28
+ %tmp32 = select i1 %tmp31, i32 %tmp30, i32 %tmp28
+ %tmp33 = select i1 %tmp31, i64 5, i64 %tmp29
+ %tmp34 = load i32, i32* %tmp9, align 8, !tbaa !3
+ %tmp35 = icmp slt i32 %tmp34, %tmp32
+ %tmp36 = select i1 %tmp35, i32 %tmp34, i32 %tmp32
+ %tmp37 = select i1 %tmp35, i64 6, i64 %tmp33
+ %tmp38 = load i32, i32* %tmp11, align 4, !tbaa !3
+ %tmp39 = icmp slt i32 %tmp38, %tmp36
+ %tmp40 = select i1 %tmp39, i64 7, i64 %tmp37
+ store i64 %tmp40, i64* %tmp2, align 8, !tbaa !8
+ call void asm sideeffect "", "=*m,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* nonnull %tmp2, i64* nonnull %tmp2) #4, !srcloc !10
+ %tmp41 = load %struct.widget*, %struct.widget** @stderr, align 8, !tbaa !11
+ %tmp42 = load i64, i64* %tmp2, align 8, !tbaa !8
+ %tmp43 = call i32 (%struct.widget*, i8*, ...) @fprintf(%struct.widget* %tmp41, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @stderr.1, i64 0, i64 0), i64 %tmp42) #5
+ %tmp44 = load i64, i64* %tmp2, align 8, !tbaa !8
+ %tmp45 = icmp eq i64 %tmp44, 5
+ br i1 %tmp45, label %bb47, label %bb46
+
+bb46: ; preds = %bb
+ call void @abort() #6
+ unreachable
+
+bb47: ; preds = %bb
+ call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %tmp12) #4
+ call void @llvm.lifetime.end.p0i8(i64 32, i8* nonnull %tmp3) #4
+ ret i32 0
+}
+
+; Function Attrs: argmemonly nounwind
+declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #1
+
+; Function Attrs: nounwind
+declare i32 @fprintf(%struct.widget* nocapture, i8* nocapture readonly, ...) local_unnamed_addr #2
+
+; Function Attrs: noreturn nounwind
+declare void @abort() local_unnamed_addr #3
+
+; Function Attrs: argmemonly nounwind
+declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1
+
+attributes #0 = { norecurse uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+avx,+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { argmemonly nounwind }
+attributes #2 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+avx,+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #3 = { noreturn nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+avx,+fxsr,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #4 = { nounwind }
+attributes #5 = { cold }
+attributes #6 = { noreturn nounwind }
+
+!0 = !{i32 1, !"wchar_size", i32 4}
+!1 = !{i32 7, !"PIC Level", i32 2}
+!3 = !{!4, !4, i64 0}
+!4 = !{!"int", !5, i64 0}
+!5 = !{!"omnipotent char", !6, i64 0}
+!6 = !{!"Simple C++ TBAA"}
+!7 = !{i32 775}
+!8 = !{!9, !9, i64 0}
+!9 = !{!"long", !5, i64 0}
+!10 = !{i32 870}
+!11 = !{!12, !12, i64 0}
+!12 = !{!"any pointer", !5, i64 0}
More information about the llvm-commits
mailing list