[llvm] r313535 - [AArch64] Add V8_2aOps feature to Cortex-A55 and 75
Sam Parker via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 18 07:46:14 PDT 2017
Author: sam_parker
Date: Mon Sep 18 07:46:14 2017
New Revision: 313535
URL: http://llvm.org/viewvc/llvm-project?rev=313535&view=rev
Log:
[AArch64] Add V8_2aOps feature to Cortex-A55 and 75
Add the missing hardware features the ProcA55 and ProcA75 feature.
These are already enabled via the target parser, but I had missed
them in the backend.
Differential Revision: https://reviews.llvm.org/D37974
Modified:
llvm/trunk/lib/Target/AArch64/AArch64.td
llvm/trunk/test/MC/AArch64/armv8.1a-lse.s
llvm/trunk/test/MC/AArch64/crc.s
llvm/trunk/test/MC/AArch64/ras-extension.s
Modified: llvm/trunk/lib/Target/AArch64/AArch64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64.td?rev=313535&r1=313534&r2=313535&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64.td Mon Sep 18 07:46:14 2017
@@ -215,6 +215,7 @@ def ProcA53 : SubtargetFeature<"a53"
def ProcA55 : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55",
"Cortex-A55 ARM processors", [
+ HasV8_2aOps,
FeatureCrypto,
FeatureFPARMv8,
FeatureFuseAES,
@@ -262,6 +263,7 @@ def ProcA73 : SubtargetFeature<"a73"
def ProcA75 : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75",
"Cortex-A75 ARM processors", [
+ HasV8_2aOps,
FeatureCrypto,
FeatureFPARMv8,
FeatureFuseAES,
Modified: llvm/trunk/test/MC/AArch64/armv8.1a-lse.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/armv8.1a-lse.s?rev=313535&r1=313534&r2=313535&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/armv8.1a-lse.s (original)
+++ llvm/trunk/test/MC/AArch64/armv8.1a-lse.s Mon Sep 18 07:46:14 2017
@@ -1,5 +1,9 @@
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a,+lse -show-encoding < %s 2> %t | FileCheck %s
// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a55 -show-encoding < %s 2> %t | FileCheck %s
+// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mcpu=cortex-a75 -show-encoding < %s 2> %t | FileCheck %s
+// RUN: FileCheck -check-prefix=CHECK-ERROR < %t %s
.text
cas w0, w1, [x2]
Modified: llvm/trunk/test/MC/AArch64/crc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/crc.s?rev=313535&r1=313534&r2=313535&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/crc.s (original)
+++ llvm/trunk/test/MC/AArch64/crc.s Mon Sep 18 07:46:14 2017
@@ -1,6 +1,11 @@
// RUN: llvm-mc -triple aarch64-- -mattr=+crc %s 2>&1 |\
// RUN: FileCheck %s --check-prefix=CRC
+// RUN: llvm-mc -triple aarch64-- -mcpu=cortex-a55 %s 2>&1 |\
+// RUN: FileCheck %s --check-prefix=CRC
+// RUN: llvm-mc -triple aarch64-- -mcpu=cortex-a75 %s 2>&1 |\
+// RUN: FileCheck %s --check-prefix=CRC
+
// RUN: not llvm-mc -triple aarch64-- %s 2>&1 |\
// RUN: FileCheck %s --check-prefix=NOCRC
// RUN: not llvm-mc -triple aarch64-- -mcpu=cyclone %s 2>&1 |\
Modified: llvm/trunk/test/MC/AArch64/ras-extension.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/ras-extension.s?rev=313535&r1=313534&r2=313535&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/ras-extension.s (original)
+++ llvm/trunk/test/MC/AArch64/ras-extension.s Mon Sep 18 07:46:14 2017
@@ -1,4 +1,6 @@
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+ras < %s | FileCheck %s
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a55 < %s | FileCheck %s
+// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=cortex-a75 < %s | FileCheck %s
esb
// CHECK: esb // encoding: [0x1f,0x22,0x03,0xd5]
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