[PATCH] D37847: AMDGPU: VALU carry-in and v_cndmask condition cannot be EXEC

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle created this revision.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, wdng, kzhuravl.

The hardware will only forward EXEC_LO; the high 32 bits will be zero.

Additionally, inline constants do not work. At least,

  v_addc_u32_e64 v0, vcc, v0, v1, -1

which could conceivably be used to combine (v0 + v1 + 1) into a single
instruction, acts as if all carry-in bits are zero.

The llvm.amdgcn.ps.live test is adjusted; it would be nice to combine

  s_mov_b64 s[0:1], exec
  v_cndmask_b32_e64 v0, v1, v2, s[0:1]

into

  v_mov_b32 v0, v3

but it's not particularly high priority.

Fixes dEQP-GLES31.functional.shaders.helper_invocation.value.*


https://reviews.llvm.org/D37847

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.td
  lib/Target/AMDGPU/SILowerI1Copies.cpp
  lib/Target/AMDGPU/SIRegisterInfo.td
  test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
  test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir
  test/CodeGen/AMDGPU/shrink-carry.mir
  test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir

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