[PATCH] D37762: [InstCombine] Remove single use restriction from InstCombine's explicit sinking code.

[Davide Italiano via Phabricator via llvm-commits]

davide added a subscriber: kuhar.
davide added a comment.

In https://reviews.llvm.org/D37762#870202, @hfinkel wrote:

> In https://reviews.llvm.org/D37762#870140, @rriddle wrote:
>
> > Has there been any sort of discussion on expanding/using the existing IR level code sinking pass? I am referring to the SinkingPass in scalar/sink.cpp. AFAIK it's only used in the AMDGPU preisel pipeline. I don't know it's current state/usability but the description of the pass is:
> >
> > // This pass moves instructions into successor blocks, when possible, so that
> >  // they aren't executed on paths where their results aren't needed.
>
>
> Doing this as a late IR pass makes sense. Taking a quick look at the implementation, there may be some improvements that would help (e.g., make it use MemorySSA, better handling of debug info, use a postdom tree). Considering adding this to the default codegen IR pipeline could be a good idea (and maybe better than trying to do a better job at the MI level?).


One of the reason why this was blocked for improvement was that until recently, we didn't have a functional post dominator tree construction (wrt unreachable blocks et similia).
@kuhar and Danny fixed it recently so that shouldn't be a problem anymore. We might really considering removing this code from InstCombine.


https://reviews.llvm.org/D37762