[llvm] r313147 - [Power9] Add missing instructions: extswsli, popcntb
Stefan Pintilie via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 13 07:05:27 PDT 2017
Author: stefanp
Date: Wed Sep 13 07:05:27 2017
New Revision: 313147
URL: http://llvm.org/viewvc/llvm-project?rev=313147&view=rev
Log:
[Power9] Add missing instructions: extswsli, popcntb
Added the following P9 instructions: extswsli, extswsli., popcntb
Differential Revision: https://reviews.llvm.org/D37342
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
llvm/trunk/test/MC/PowerPC/ppc64-encoding.s
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=313147&r1=313146&r2=313147&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Wed Sep 13 07:05:27 2017
@@ -642,6 +642,11 @@ def EXTSW_32 : XForm_11<31, 986, (outs g
defm SRADI : XSForm_1rc<31, 413, (outs g8rc:$rA), (ins g8rc:$rS, u6imm:$SH),
"sradi", "$rA, $rS, $SH", IIC_IntRotateDI,
[(set i64:$rA, (sra i64:$rS, (i32 imm:$SH)))]>, isPPC64;
+
+defm EXTSWSLI : XSForm_1r<31, 445, (outs g8rc:$rA), (ins g8rc:$rS, u6imm:$SH),
+ "extswsli", "$rA, $rS, $SH", IIC_IntRotateDI,
+ []>, isPPC64;
+
// For fast-isel:
let isCodeGenOnly = 1, Defs = [CARRY] in
def SRADI_32 : XSForm_1<31, 413, (outs gprc:$rA), (ins gprc:$rS, u6imm:$SH),
@@ -673,6 +678,9 @@ def POPCNTW : XForm_11<31, 378, (outs gp
"popcntw $rA, $rS", IIC_IntGeneral,
[(set i32:$rA, (ctpop i32:$rS))]>;
+def POPCNTB : XForm_11<31, 122, (outs gprc:$rA), (ins gprc:$rS),
+ "popcntb $rA, $rS", IIC_IntGeneral, []>;
+
defm DIVD : XOForm_1rcr<31, 489, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
"divd", "$rT, $rA, $rB", IIC_IntDivD,
[(set i64:$rT, (sdiv i64:$rA, i64:$rB))]>, isPPC64;
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td?rev=313147&r1=313146&r2=313147&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.td Wed Sep 13 07:05:27 2017
@@ -1057,6 +1057,20 @@ multiclass XSForm_1rc<bits<6> opcode, bi
}
}
+multiclass XSForm_1r<bits<6> opcode, bits<9> xo, dag OOL, dag IOL,
+ string asmbase, string asmstr, InstrItinClass itin,
+ list<dag> pattern> {
+ let BaseName = asmbase in {
+ def NAME : XSForm_1<opcode, xo, OOL, IOL,
+ !strconcat(asmbase, !strconcat(" ", asmstr)), itin,
+ pattern>, RecFormRel;
+ let Defs = [CR0] in
+ def o : XSForm_1<opcode, xo, OOL, IOL,
+ !strconcat(asmbase, !strconcat(". ", asmstr)), itin,
+ []>, isDOT, RecFormRel;
+ }
+}
+
multiclass XForm_26r<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
string asmbase, string asmstr, InstrItinClass itin,
list<dag> pattern> {
Modified: llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt?rev=313147&r1=313146&r2=313147&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt (original)
+++ llvm/trunk/test/MC/Disassembler/PowerPC/ppc64-encoding.txt Wed Sep 13 07:05:27 2017
@@ -550,6 +550,9 @@
# CHECK: popcntw 2, 3
0x7c 0x62 0x02 0xf4
+# CHECK: popcntb 2, 3
+0x7c 0x62 0x00 0xf4
+
# CHECK: extsw 2, 3
0x7c 0x62 0x07 0xb4
@@ -673,6 +676,12 @@
# CHECK: srad. 2, 3, 4
0x7c 0x62 0x26 0x35
+# CHECK: extswsli 2, 3, 4
+0x7c 0x62 0x26 0xf4
+
+# CHECK: extswsli. 2, 3, 4
+0x7c 0x62 0x26 0xf5
+
# CHECK: mtspr 600, 2
0x7c 0x58 0x93 0xa6
Modified: llvm/trunk/test/MC/PowerPC/ppc64-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/ppc64-encoding.s?rev=313147&r1=313146&r2=313147&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/ppc64-encoding.s (original)
+++ llvm/trunk/test/MC/PowerPC/ppc64-encoding.s Wed Sep 13 07:05:27 2017
@@ -726,7 +726,9 @@
cmpb 7, 21, 4
# CHECK-BE: cmpb 7, 21, 4 # encoding: [0x7e,0xa7,0x23,0xf8]
# CHECK-LE: cmpb 7, 21, 4 # encoding: [0xf8,0x23,0xa7,0x7e]
-# FIXME: popcntb 2, 3
+# CHECK-BE: popcntb 2, 3 # encoding: [0x7c,0x62,0x00,0xf4]
+# CHECK-LE: popcntb 2, 3 # encoding: [0xf4,0x00,0x62,0x7c]
+ popcntb 2, 3
# CHECK-BE: popcntw 2, 3 # encoding: [0x7c,0x62,0x02,0xf4]
# CHECK-LE: popcntw 2, 3 # encoding: [0xf4,0x02,0x62,0x7c]
popcntw 2, 3
@@ -885,6 +887,13 @@
# CHECK-BE: srad. 2, 3, 4 # encoding: [0x7c,0x62,0x26,0x35]
# CHECK-LE: srad. 2, 3, 4 # encoding: [0x35,0x26,0x62,0x7c]
srad. 2, 3, 4
+# CHECK-BE: extswsli 2, 3, 4 # encoding: [0x7c,0x62,0x26,0xf4]
+# CHECK-LE: extswsli 2, 3, 4 # encoding: [0xf4,0x26,0x62,0x7c]
+ extswsli 2, 3, 4
+# CHECK-BE: extswsli. 2, 3, 4 # encoding: [0x7c,0x62,0x26,0xf5]
+# CHECK-LE: extswsli. 2, 3, 4 # encoding: [0xf5,0x26,0x62,0x7c]
+ extswsli. 2, 3, 4
+
# FIXME: BCD assist instructions
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