[PATCH] D37579: [InstCombine] Fix PR21780 Expansion of 256 bit vector loads fails to fold into shuffles

[Sanjoy Das via Phabricator via llvm-commits]

sanjoy added a comment.

In https://reviews.llvm.org/D37579#868685, @sanjoy wrote:

> Why not leave the original load in place, and tag the load metadata like `!speculation_marker` ?  In either case, this needs a LangRef entry.


Re-reading, I messed up the phrasing there.  I meant to say two things:

- You could consider leaving the original load in place, and tag it with something like `!speculation_marker`.  This metadata would indicate to passes like DCE that said load should not be eliminated till the very end of the optimization pipeline (so that we keep the optimization information for as long as possible).  This does block optimizations though (like you will not be able to sink stores across this now present load, something you may have been able to do with the intrinsic you're introducing, though not without figuring out a way to denote it as not reading memory), but it has the upside of not introducing a new intrinsic.
- Irrespective of whether you decide to go with the intrinsic or the metadata approach, please also update the language reference with an entry describing the semantics of this new thing.


https://reviews.llvm.org/D37579