[PATCH] D37686: [DAG] Consolidating Instruction->SDNode Flags propagation in one class for better code management.
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 11 10:27:02 PDT 2017
spatel added a comment.
In https://reviews.llvm.org/D37686#866641, @jbhateja wrote:
> In https://reviews.llvm.org/D37686#866521, @spatel wrote:
>
> > How does this work if an instruction maps to multiple nodes? For example, the FMA intrinsic can map to 2 nodes?
>
>
> This propagation happens during SelectionDAGBuilder::visit, I scanned through various instructions and there is 1:1 mapping b/w instructions and initial SDNode created for it.
case Intrinsic::fmuladd: {
EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
if (TM.Options.AllowFPOpFusion != FPOpFusion::Strict &&
TLI.isFMAFasterThanFMulAndFAdd(VT)) {
setValue(&I, DAG.getNode(ISD::FMA, sdl,
getValue(I.getArgOperand(0)).getValueType(),
getValue(I.getArgOperand(0)),
getValue(I.getArgOperand(1)),
getValue(I.getArgOperand(2))));
} else {
// TODO: Intrinsic calls should have fast-math-flags.
SDValue Mul = DAG.getNode(ISD::FMUL, sdl,
getValue(I.getArgOperand(0)).getValueType(),
getValue(I.getArgOperand(0)),
getValue(I.getArgOperand(1)));
SDValue Add = DAG.getNode(ISD::FADD, sdl,
getValue(I.getArgOperand(0)).getValueType(),
Mul,
getValue(I.getArgOperand(2)));
setValue(&I, Add);
}
> Ok, we also have another usage of Fast Maths flage in reviev https://reviews.llvm.org/D37616. Can you please file a bugzilla to track suggested potential improvment.
https://bugs.llvm.org/show_bug.cgi?id=34558
https://reviews.llvm.org/D37686
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