[DAG][X86] Fixing X86 DAG Selecting that if BLENDPD instruction has 1 mask and target architecture doesn't suffer from partial register stalls replace BLENDPD to MOVSD

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Sep 9 09:36:52 PDT 2017


I don't understand this patch at all. MOVSD wasn't even added until SSE2.
I'm actually confused by the partial register update stall comment. There
is no partial register stall. The MOVSD instruction takes two registers as
input and merges them. That's how the instruction works. It's a normal data
dependency. I don't think there's any special penalty for that. BLENDI
would behave the same way.

~Craig

On Sat, Sep 9, 2017 at 2:49 AM, Jun Ryung Ju via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Fixing X86 DAG Selecting that if BLENDPD instruction has 1 mask and target
> architecture doesn't suffer from partial register stalls replace BLENDPD to
> MOVSD
>
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