[PATCH] D37648: [SLPVectorizer] Fix PR21780 Expansion of 256 bit vector loads fails to fold into shuffles

[Dinar Temirbulatov via Phabricator via llvm-commits]

dtemirbulatov created this revision.
Herald added a subscriber: rengolin.

This is the second part of PR21780 fix, here is part one https://reviews.llvm.org/D37579

This change allows to restore Load, Insert, GEP instructions removed by InstCombine pass. Here I am using intrinsic to keep information in the IR as it was discussed in http://lists.llvm.org/pipermail/llvm-dev/2017-July/115730.html.

Before restoring instructions we have have to check existing instructions for belonging to our basic block, also we check the shuffle mask and all offset, ...


https://reviews.llvm.org/D37648

Files:
  include/llvm/IR/Intrinsics.td
  include/llvm/Transforms/Vectorize/SLPVectorizer.h
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/Transforms/Vectorize/SLPVectorizer.cpp
  test/Transforms/SLPVectorizer/X86/pr21780.ll

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