[PATCH] D37559: [X86FixupBWInsts] More presise register liveness if no <imp-use> on MOVs.

[Andrei Elovikov via Phabricator via llvm-commits]

a.elovikov created this revision.
Herald added a subscriber: hiraditya.

Subregister liveness tracking is not implemented for X86 backend, so
sometimes the whole super register is said to be live, when only a
subregister is really live. That might happen if the def and the use
are located in different MBBs, see added fixup-bw-isnt.mir test.

However, using knowledge of the specific instructions handled by the
bw-fixup-pass we can get more precise liveness information which this
change does.


https://reviews.llvm.org/D37559

Files:
  llvm/lib/Target/X86/X86FixupBWInsts.cpp
  llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
  llvm/test/CodeGen/X86/avx2-vbroadcast.ll
  llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
  llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
  llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
  llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
  llvm/test/CodeGen/X86/bitreverse.ll
  llvm/test/CodeGen/X86/cmov.ll
  llvm/test/CodeGen/X86/fixup-bw-inst.mir
  llvm/test/CodeGen/X86/pr32345.ll
  llvm/test/CodeGen/X86/pr32420.ll
  llvm/test/CodeGen/X86/pr34137.ll
  llvm/test/CodeGen/X86/select.ll
  llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
  llvm/test/CodeGen/X86/vector-half-conversions.ll

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