[llvm] r312612 - [PowerPC] Don't use xscvdpspn on the P7

[Hal Finkel via llvm-commits]

Author: hfinkel
Date: Tue Sep  5 20:08:26 2017
New Revision: 312612

URL: http://llvm.org/viewvc/llvm-project?rev=312612&view=rev
Log:
[PowerPC] Don't use xscvdpspn on the P7

xscvdpspn was not introduced until the P8, so don't use it on the P7. Fixes a
regression introduced in r288152.

Added:
    llvm/trunk/test/CodeGen/PowerPC/fp-splat.ll
Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=312612&r1=312611&r2=312612&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Sep  5 20:08:26 2017
@@ -7463,9 +7463,11 @@ static SDValue BuildVSLDOI(SDValue LHS,
 /// - The node is a "load-and-splat"
 /// In all other cases, we will choose to keep the BUILD_VECTOR.
 static bool haveEfficientBuildVectorPattern(BuildVectorSDNode *V,
-                                            bool HasDirectMove) {
+                                            bool HasDirectMove,
+                                            bool HasP8Vector) {
   EVT VecVT = V->getValueType(0);
-  bool RightType = VecVT == MVT::v2f64 || VecVT == MVT::v4f32 ||
+  bool RightType = VecVT == MVT::v2f64 ||
+    (HasP8Vector && VecVT == MVT::v4f32) ||
     (HasDirectMove && (VecVT == MVT::v2i64 || VecVT == MVT::v4i32));
   if (!RightType)
     return false;
@@ -7627,7 +7629,8 @@ SDValue PPCTargetLowering::LowerBUILD_VE
     // lowered to VSX instructions under certain conditions.
     // Without VSX, there is no pattern more efficient than expanding the node.
     if (Subtarget.hasVSX() &&
-        haveEfficientBuildVectorPattern(BVN, Subtarget.hasDirectMove()))
+        haveEfficientBuildVectorPattern(BVN, Subtarget.hasDirectMove(),
+                                        Subtarget.hasP8Vector()))
       return Op;
     return SDValue();
   }

Added: llvm/trunk/test/CodeGen/PowerPC/fp-splat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fp-splat.ll?rev=312612&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fp-splat.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/fp-splat.ll Tue Sep  5 20:08:26 2017
@@ -0,0 +1,27 @@
+; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefix=CHECK-P8 -check-prefix=CHECK
+; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=CHECK-P7 -check-prefix=CHECK
+
+define <4 x float> @test1(float %a) {
+entry:
+; CHECK-LABEL: test1
+  %vecins = insertelement <4 x float> undef, float %a, i32 0
+  %vecins1 = insertelement <4 x float> %vecins, float %a, i32 1
+  %vecins2 = insertelement <4 x float> %vecins1, float %a, i32 2
+  %vecins3 = insertelement <4 x float> %vecins2, float %a, i32 3
+  ret <4 x float> %vecins3
+; CHECK-P8: xscvdpspn
+; CHECK-P7-NOT: xscvdpspn
+; CHECK: blr
+}
+
+define <2 x double> @test2(double %a) {
+entry:
+; CHECK-LABEL: test2
+  %vecins = insertelement <2 x double> undef, double %a, i32 0
+  %vecins1 = insertelement <2 x double> %vecins, double %a, i32 1
+  ret <2 x double> %vecins1
+; CHECK-P8: xxspltd
+; CHECK-P7: xxspltd
+; CHECK: blr
+}
+