[PATCH] D37335: [MIPS] Initial support of microMIPS code linking

[Rui Ueyama via Phabricator via llvm-commits]

ruiu added inline comments.


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Comment at: ELF/Arch/Mips.cpp:288
+  if (isMicroMips<ELFT>()) {
+    memset(Buf, 0, PltEntrySize);
+    if (isMipsR6<ELFT>()) {
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atanasyan wrote:
> ruiu wrote:
> > ruiu wrote:
> > > Do you need this?
> > Is this needed?
> In short - yes, the memset call is required to overwrite trap instructions 0xefefefef. Here is a slightly modified quote from my previous reply:
> 
> Keep memset calls in writePltHeader and writePlt methods. In short, size of actual PLT entry can be less than PltEntrySize and we need to fill unused space by "nops". When we initialize PltEntrySize and PltHeaderSize fields we do not know what kind of PLT header/entry we will need to create: regular of microMIPS. These entries have different sizes. Ideally, if a PLT entry is referenced by microMIPS code only this entry should contain microMIPS code, if a PLT entry is referenced by regular code this entry should contain regular code. In a "mixed" case the PLT entry can be either microMIPS or regular, but each "cross-mode-call" has additional cost. Now LLD cannot: a) maintain PLT records with different sizes; b) record type of references (regular / microMIPS) for a PLT entry. To simplify the patch I assume that usually the most or all code have the same type regular or microMIPS. I allocate space for the largest PLT header/entry, but at the time of PLT creation I write either regular or microMIPS entries only. In the last case PLT has gaps filled by 0xefefefef which needs to be filled by "nops".
Thanks. Can you add a comment saying that this is to overwrite trap instructions written by Writer::writeTrapInstr?


Repository:
  rL LLVM

https://reviews.llvm.org/D37335