[PATCH] D32776: [PowerPC] Update branch coalescing to be a PowerPC specific pass
Sean Fertile via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 5 13:19:33 PDT 2017
sfertile added inline comments.
================
Comment at: lib/CodeGen/TargetPassConfig.cpp:52
cl::desc("Enable interprocedural register allocation "
"to reduce load/store at procedure calls."));
static cl::opt<bool> DisablePostRASched("disable-post-ra", cl::Hidden,
----------------
hfinkel wrote:
> iteratee wrote:
> > lei wrote:
> > > iteratee wrote:
> > > > These seem unrelated. Can you pull them out?
> > > I do not understand why you want me to pull these out. They were not added by me and it is being used later on in this src.
> > Sorry, I was trying to look at your original diff vs this one to see what changed.
> What are you talking about? I see no changes here.
If you compare diff 4 to diff 5 it makes it look like EnableIPRA got added in diff 5.
https://reviews.llvm.org/D32776
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