[PATCH] D37294: [X86][Skylake] Adding the scheduling information for the SkylakeClient target

[Gadi Haber via Phabricator via llvm-commits]

gadi.haber added inline comments.


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Comment at: test/CodeGen/X86/avx2-intrinsics-x86.ll:1625
+; AVX512VL-NEXT:    vmovaps %ymm2, %ymm3 ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xda]
+; AVX512VL-NEXT:    vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 ## encoding: [0xc4,0xe2,0x65,0x92,0x04,0x89]
 ; AVX512VL-NEXT:    vmovups %ymm2, (%eax) ## EVEX TO VEX Compression encoding: [0xc5,0xfc,0x11,0x10]
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RKSimon wrote:
> gadi.haber wrote:
> > RKSimon wrote:
> > > I feels tests like this shouldn't change with schedule model tweaks - it's supposed to be a codegen test not a target specific test.
> > > 
> > > Would it be possible to reduce the use of -mcpu from tests that aren't actually testing for scheduling? 
> > Sure. I can modify the tests.  IS there a list of such tests that we can assume to tests only code gen?
> Most of the non *-schedule.ll ones here for instance, the vector-shift-*.ll are another set I can remember kept changing.
OK. In that case I suggest to abandon this review.  I will modify the tests and commit them as NFC and the re-upload it for review after the commit.


Repository:
  rL LLVM

https://reviews.llvm.org/D37294