[PATCH] D37388: [X86] Allow cross-lane permutations for sub targets supporting AVX2.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM with a few minors to fix before commit



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Comment at: lib/Target/X86/X86ISelLowering.cpp:12071
+                                                       SelectionDAG &DAG,
+                                                       const X86Subtarget &Subtarget) {
   // FIXME: This should probably be generalized for 512-bit vectors as well.
----------------
clang-format ? (80-column limit)


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:12079
+  // support AVX2 so split to chop out in-lane shuffle access part. For sub-targets 
+  // supporting AVX2 split if half of the lanes is not accessed by shuffle mask.
+  if (!Subtarget.hasAVX2()) {
----------------
half of the lanes are not


https://reviews.llvm.org/D37388