[llvm] r312522 - [ARM] GlobalISel: Minor cleanups in inst selector
Diana Picus via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 5 01:22:48 PDT 2017
Author: rovka
Date: Tue Sep 5 01:22:47 2017
New Revision: 312522
URL: http://llvm.org/viewvc/llvm-project?rev=312522&view=rev
Log:
[ARM] GlobalISel: Minor cleanups in inst selector
Use the STI member of ARMInstructionSelector instead of
TII.getSubtarget() and also make use of STI's methods instead of
checking the object format manually.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp?rev=312522&r1=312521&r2=312522&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp Tue Sep 5 01:22:47 2017
@@ -502,8 +502,7 @@ bool ARMInstructionSelector::selectGloba
auto &MBB = *MIB->getParent();
auto &MF = *MBB.getParent();
- auto ObjectFormat = TII.getSubtarget().getTargetTriple().getObjectFormat();
- bool UseMovt = TII.getSubtarget().useMovt(MF);
+ bool UseMovt = STI.useMovt(MF);
unsigned Size = TM.getPointerSize();
unsigned Alignment = 4;
@@ -529,16 +528,16 @@ bool ARMInstructionSelector::selectGloba
};
if (TM.isPositionIndependent()) {
- bool Indirect = TII.getSubtarget().isGVIndirectSymbol(GV);
+ bool Indirect = STI.isGVIndirectSymbol(GV);
// FIXME: Taking advantage of MOVT for ELF is pretty involved, so we don't
// support it yet. See PR28229.
unsigned Opc =
- UseMovt && !TII.getSubtarget().isTargetELF()
+ UseMovt && !STI.isTargetELF()
? (Indirect ? ARM::MOV_ga_pcrel_ldr : ARM::MOV_ga_pcrel)
: (Indirect ? ARM::LDRLIT_ga_pcrel_ldr : ARM::LDRLIT_ga_pcrel);
MIB->setDesc(TII.get(Opc));
- if (TII.getSubtarget().isTargetDarwin())
+ if (STI.isTargetDarwin())
MIB->getOperand(1).setTargetFlags(ARMII::MO_NONLAZY);
if (Indirect)
@@ -546,7 +545,7 @@ bool ARMInstructionSelector::selectGloba
MachinePointerInfo::getGOT(MF), MachineMemOperand::MOLoad,
TM.getPointerSize(), Alignment));
- return true;
+ return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI);
}
bool isReadOnly = STI.getTargetLowering()->isReadOnly(GV);
@@ -582,7 +581,7 @@ bool ARMInstructionSelector::selectGloba
return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI);
}
- if (ObjectFormat == Triple::ELF) {
+ if (STI.isTargetELF()) {
if (UseMovt) {
MIB->setDesc(TII.get(ARM::MOVi32imm));
} else {
@@ -591,7 +590,7 @@ bool ARMInstructionSelector::selectGloba
MIB->RemoveOperand(1);
addOpsForConstantPoolLoad(MIB, GV, /*IsSBREL*/ false);
}
- } else if (ObjectFormat == Triple::MachO) {
+ } else if (STI.isTargetMachO()) {
if (UseMovt)
MIB->setDesc(TII.get(ARM::MOVi32imm));
else
@@ -749,12 +748,12 @@ bool ARMInstructionSelector::select(Mach
return selectCmp(Helper, MIB, MRI);
}
case G_FCMP: {
- assert(TII.getSubtarget().hasVFP2() && "Can't select fcmp without VFP");
+ assert(STI.hasVFP2() && "Can't select fcmp without VFP");
unsigned OpReg = I.getOperand(2).getReg();
unsigned Size = MRI.getType(OpReg).getSizeInBits();
- if (Size == 64 && TII.getSubtarget().isFPOnlySP()) {
+ if (Size == 64 && STI.isFPOnlySP()) {
DEBUG(dbgs() << "Subtarget only supports single precision");
return false;
}
@@ -815,7 +814,7 @@ bool ARMInstructionSelector::select(Mach
LLT ValTy = MRI.getType(Reg);
const auto ValSize = ValTy.getSizeInBits();
- assert((ValSize != 64 || TII.getSubtarget().hasVFP2()) &&
+ assert((ValSize != 64 || STI.hasVFP2()) &&
"Don't know how to load/store 64-bit value without VFP");
const auto NewOpc = selectLoadStoreOpCode(I.getOpcode(), RegBank, ValSize);
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