[PATCH] D37399: [X86][TableGen] Teach tblgen to allow SDNPCommutable nodes with more than 2 operands. Use it to remove and enhance FMA patterns

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.

Tblgen already supports commutable instrinsics with more than 2 operands. There it just assumes the first two operands are commutable.

This patch extends this capability to SDNode and enables it from some of the FMA related nodes in X86.

This allows us to remove some of the extra FMA patterns that have to put loads and mask operands in different places to cover all cases. This even includes patterns that were missing to support match a load in the first operand with FMA4. Non-broadcast loads with masking for AVX512.

I believe this is causing us to generate some duplicate patterns because tablegen's isomorphism checks don't catch isomorphism between the patterns as written in the td. It only detects isomorphism in the commuted variants it tries to create. The the unmasked 231 and 132 memory forms are isomorphic as written in the td file so we end up keeping both. I think we precommute the 132 pattern to fix this.

We also need a follow up patch to go back to the legacy FMA3 instructions and add patterns to the 231 and 132 forms which we currently don't have.


https://reviews.llvm.org/D37399

Files:
  lib/Target/X86/X86InstrAVX512.td
  lib/Target/X86/X86InstrFMA.td
  lib/Target/X86/X86InstrFragmentsSIMD.td
  utils/TableGen/CodeGenDAGPatterns.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D37399.113595.patch
Type: text/x-patch
Size: 12768 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170901/362b8046/attachment.bin>