[PATCH] D37342: [Power9] Add missing instructions: extswsli, popcntb

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp created this revision.

Added the following instructions:

- extswsli
- extswsli.
- popcntb




https://reviews.llvm.org/D37342

Files:
  lib/Target/PowerPC/PPCInstr64Bit.td
  test/MC/Disassembler/PowerPC/ppc64-encoding.txt
  test/MC/PowerPC/ppc64-encoding.s


Index: test/MC/PowerPC/ppc64-encoding.s
===================================================================
--- test/MC/PowerPC/ppc64-encoding.s
+++ test/MC/PowerPC/ppc64-encoding.s
@@ -726,7 +726,9 @@
             cmpb 7, 21, 4
 # CHECK-BE: cmpb 7, 21, 4                   # encoding: [0x7e,0xa7,0x23,0xf8]
 # CHECK-LE: cmpb 7, 21, 4                   # encoding: [0xf8,0x23,0xa7,0x7e]
-# FIXME:    popcntb 2, 3
+# CHECK-BE: popcntb 2, 3                    # encoding: [0x7c,0x62,0x00,0xf4]
+# CHECK-LE: popcntb 2, 3                    # encoding: [0xf4,0x00,0x62,0x7c]
+            popcntb 2, 3
 # CHECK-BE: popcntw 2, 3                    # encoding: [0x7c,0x62,0x02,0xf4]
 # CHECK-LE: popcntw 2, 3                    # encoding: [0xf4,0x02,0x62,0x7c]
             popcntw 2, 3
@@ -885,6 +887,13 @@
 # CHECK-BE: srad. 2, 3, 4                   # encoding: [0x7c,0x62,0x26,0x35]
 # CHECK-LE: srad. 2, 3, 4                   # encoding: [0x35,0x26,0x62,0x7c]
             srad. 2, 3, 4
+# CHECK-BE: extswsli 2, 3, 4                # encoding: [0x7c,0x62,0x26,0xf4]
+# CHECK-LE: extswsli 2, 3, 4                # encoding: [0xf4,0x26,0x62,0x7c]
+            extswsli 2, 3, 4
+# CHECK-BE: extswsli. 2, 3, 4               # encoding: [0x7c,0x62,0x26,0xf5]
+# CHECK-LE: extswsli. 2, 3, 4               # encoding: [0xf5,0x26,0x62,0x7c]
+            extswsli. 2, 3, 4
+
 
 # FIXME: BCD assist instructions
 
Index: test/MC/Disassembler/PowerPC/ppc64-encoding.txt
===================================================================
--- test/MC/Disassembler/PowerPC/ppc64-encoding.txt
+++ test/MC/Disassembler/PowerPC/ppc64-encoding.txt
@@ -550,6 +550,9 @@
 # CHECK: popcntw 2, 3                    
 0x7c 0x62 0x02 0xf4
 
+# CHECK: popcntb 2, 3                    
+0x7c 0x62 0x00 0xf4
+
 # CHECK: extsw 2, 3                      
 0x7c 0x62 0x07 0xb4
 
@@ -673,6 +676,12 @@
 # CHECK: srad. 2, 3, 4                   
 0x7c 0x62 0x26 0x35
 
+# CHECK: extswsli 2, 3, 4                
+0x7c 0x62 0x26 0xf4
+
+# CHECK: extswsli. 2, 3, 4               
+0x7c 0x62 0x26 0xf5
+
 # CHECK: mtspr 600, 2                    
 0x7c 0x58 0x93 0xa6
 
Index: lib/Target/PowerPC/PPCInstr64Bit.td
===================================================================
--- lib/Target/PowerPC/PPCInstr64Bit.td
+++ lib/Target/PowerPC/PPCInstr64Bit.td
@@ -642,6 +642,11 @@
 defm SRADI  : XSForm_1rc<31, 413, (outs g8rc:$rA), (ins g8rc:$rS, u6imm:$SH),
                          "sradi", "$rA, $rS, $SH", IIC_IntRotateDI,
                          [(set i64:$rA, (sra i64:$rS, (i32 imm:$SH)))]>, isPPC64;
+
+defm EXTSWSLI : XSForm_1rc<31, 445, (outs g8rc:$rA), (ins g8rc:$rS, u6imm:$SH),
+                          "extswsli", "$rA, $rS, $SH", IIC_IntRotateDI,
+                          []>, isPPC64;
+
 // For fast-isel:
 let isCodeGenOnly = 1, Defs = [CARRY] in
 def SRADI_32  : XSForm_1<31, 413, (outs gprc:$rA), (ins gprc:$rS, u6imm:$SH),
@@ -673,6 +678,9 @@
                        "popcntw $rA, $rS", IIC_IntGeneral,
                        [(set i32:$rA, (ctpop i32:$rS))]>;
 
+def POPCNTB : XForm_11<31, 122, (outs gprc:$rA), (ins gprc:$rS),
+                       "popcntb $rA, $rS", IIC_IntGeneral, []>;
+
 defm DIVD  : XOForm_1rcr<31, 489, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
                           "divd", "$rT, $rA, $rB", IIC_IntDivD,
                           [(set i64:$rT, (sdiv i64:$rA, i64:$rB))]>, isPPC64;


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