[PATCH] D37205: AMDGPU: Make worst-case assumption about the wait states in inline assembly

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

LGTM. What is the barrier for? That sounds disturbing



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Comment at: lib/Target/AMDGPU/GCNHazardRecognizer.cpp:229
+      if (Opcode == AMDGPU::DBG_VALUE || Opcode == AMDGPU::IMPLICIT_DEF ||
+          Opcode == AMDGPU::INLINEASM)
         continue;
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If you want to be fancy you could check getInlineAsmLength to approximate the number of instructions, and assume they each have 1 wait state.


https://reviews.llvm.org/D37205