[PATCH] D36960: [X86][LLVM]Expanding Supports lowerInterleavedLoad() in X86InterleavedAccess (VF{8|16|32} stride 3).

[michael zuckerman via Phabricator via llvm-commits]

m_zuckerman marked an inline comment as done.
m_zuckerman added inline comments.


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Comment at: lib/Target/X86/X86InterleavedAccess.cpp:346
+                                SmallVectorImpl<uint32_t> &Mask) {
+  int LaneCount = std::max(VectorSize / 128, 1);
+  for (int Lane = 0; Lane < LaneCount; Lane++)
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zvi wrote:
> On second thought no need for the max() with  assert(vectorSize >= 128)
You will need it for the VF8 since the VectoreSize is 64 and 64/128 is a zero and not 1.


https://reviews.llvm.org/D36960